On Thu, Nov 30, 2023 at 5:40 PM Conor Dooley <conor@xxxxxxxxxx> wrote: > > On Thu, Nov 30, 2023 at 05:18:15PM +0530, Anup Patel wrote: > > On Thu, Nov 30, 2023 at 5:15 PM Conor Dooley <conor@xxxxxxxxxx> wrote: > > > > > and add separate "riscv" prefixed DT binding for RISC-V mtimer. > > > > > > Do you know of any users for a "riscv,mtimer" binding that are not > > > covered by existing bindings for the clint? > > > > Ventana Veyron-v1 implements a mtimer per-cluster (or chiplet) > > which is compatible to "riscv,mtimer" (i.e. we have both mtime > > and mtimecmp MMIO registers). > > Okay, thanks. I guess iff veyron-v1 DT support shows up (or other > similar devices) we can go ahead with a "riscv,mtimer" binding then. > I had thought that you guys were going to be using ACPI though, so > I guess the "other similar devices" applies. We use ACPI from EDK2 onwards in our boot-flow. The booting stages prior to EDK2 (such as OpenSBI) use DT. In fact, EDK2 also uses information in DT to populate static parts of the ACPI table. Regards, Anup
