On Tue, Oct 17, 2023 at 02:50:46PM +0800, haibo.chen@xxxxxxx wrote: > From: Haibo Chen <haibo.chen@xxxxxxx> > > imx93 pad integrate has one issue, refer to ERR052021: > > ERR052021 uSDHC: Sometimes uSDHC does not work under VDD_SOC low > drive mode and nominal mode > Description: > uSDHC PADs have one integration issue. > When CMD/DATA lines direction change from output to input, uSDHC > controller begin sampling, the integration issue will make input > enable signal from uSDHC propagated to the PAD with a long delay, > thus the new input value on the pad comes to uSDHC lately. The > uSDHC sampled the old input value and the sampling result is wrong. > > Workaround: > Set uSDHC CMD/DATA PADs iomux register SION bit to 1, then PADs will > propagate input to uSDHC with no delay, so correct value is sampled. > > This issue will wrongly trigger the start bit when sample the USDHC > command response, cause the USDHC trigger command CRC/index/endbit > error, which will finally impact the tuning pass window, espically > will impact the standard tuning logic, and can't find a correct delay > cell to get the best timing. > > Signed-off-by: Haibo Chen <haibo.chen@xxxxxxx> Applied all, thanks!
