Non volatile memory area is available on STM32MP25 with OTP in BSEC. The 12 Kbits of OTP (effective) for STM32MP25x SoC Family are organized into the following regions: - lower OTP (OTP0 to OTP127) = 4096 lower OTP bits, bitwise (1-bit) programmable - mid OTP (OTP128 to OTP255) = 4096 middle OTP bits, bulk (32-bit) programmable - upper OTP (OTP256 to OTP383) = 4096 upper OTP bits, bulk (32-bit) programmable, only accessible when BSEC is in closed state. BSEC is only accessible by secure world, so the OTP access is done by driver with OP-TEE TA, as on STM32MP13x family. Patrick Delaunay (4): dt-bindings: nvmem: add new stm32mp25 compatible for stm32-romem nvmem: stm32: add support for STM32MP25 BSEC to control OTP data arm64: defconfig: enable NVMEM STM32 ROMEM for stm32mp25 nvmem: add bsec support to stm32mp25 .../bindings/nvmem/st,stm32-romem.yaml | 1 + arch/arm64/boot/dts/st/stm32mp251.dtsi | 16 ++++++++++++++++ arch/arm64/configs/defconfig | 1 + drivers/nvmem/stm32-romem.c | 16 ++++++++++++++++ 4 files changed, 34 insertions(+) -- 2.25.1
