Introduce an enumeration to define PSE types (PoE or PoDL), utilizing a bitfield for potential future support of both types. Include 'pse_get_types' helper for external access to PSE type info Signed-off-by: Kory Maincent <kory.maincent@xxxxxxxxxxx> --- drivers/net/pse-pd/pse_core.c | 9 +++++++++ drivers/net/pse-pd/pse_regulator.c | 1 + include/linux/pse-pd/pse.h | 22 ++++++++++++++++++++++ 3 files changed, 32 insertions(+) diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index 146b81f08a89..2959c94f7798 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -312,3 +312,12 @@ int pse_ethtool_set_config(struct pse_control *psec, return err; } EXPORT_SYMBOL_GPL(pse_ethtool_set_config); + +u32 pse_get_types(struct pse_control *psec) +{ + if (!psec->pcdev) + return PSE_UNKNOWN; + else + return psec->pcdev->types; +} +EXPORT_SYMBOL_GPL(pse_get_types); diff --git a/drivers/net/pse-pd/pse_regulator.c b/drivers/net/pse-pd/pse_regulator.c index 1dedf4de296e..e34ab8526067 100644 --- a/drivers/net/pse-pd/pse_regulator.c +++ b/drivers/net/pse-pd/pse_regulator.c @@ -116,6 +116,7 @@ pse_reg_probe(struct platform_device *pdev) priv->pcdev.owner = THIS_MODULE; priv->pcdev.ops = &pse_reg_ops; priv->pcdev.dev = dev; + priv->pcdev.types = PSE_PODL; ret = devm_pse_controller_register(dev, &priv->pcdev); if (ret) { dev_err(dev, "failed to register PSE controller (%pe)\n", diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 25490d0c682d..67a0ff5e480c 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -44,6 +44,19 @@ struct pse_control_status { enum ethtool_pse_pw_d_status pw_status; }; +/** + * enum - Types of PSE controller. + * + * @PSE_UNKNOWN: Type of PSE controller is unknown + * @PSE_PODL: PSE controller which support PoDL + * @PSE_POE: PSE controller which support PoE + */ +enum { + PSE_UNKNOWN = BIT(0), + PSE_PODL = BIT(1), + PSE_POE = BIT(2), +}; + /** * struct pse_controller_ops - PSE controller driver callbacks * @@ -77,6 +90,7 @@ struct pse_control; * device tree to id as given to the PSE control ops * @nr_lines: number of PSE controls in this controller device * @lock: Mutex for serialization access to the PSE controller + * @types: types of the PSE controller */ struct pse_controller_dev { const struct pse_controller_ops *ops; @@ -89,6 +103,7 @@ struct pse_controller_dev { const struct of_phandle_args *pse_spec); unsigned int nr_lines; struct mutex lock; + u32 types; }; #if IS_ENABLED(CONFIG_PSE_CONTROLLER) @@ -108,6 +123,8 @@ int pse_ethtool_set_config(struct pse_control *psec, struct netlink_ext_ack *extack, const struct pse_control_config *config); +u32 pse_get_types(struct pse_control *psec); + #else static inline struct pse_control *of_pse_control_get(struct device_node *node) @@ -133,6 +150,11 @@ static inline int pse_ethtool_set_config(struct pse_control *psec, return -ENOTSUPP; } +static u32 pse_get_types(struct pse_control *psec) +{ + return PSE_UNKNOWN; +} + #endif #endif -- 2.25.1