On 11/16/2023 1:01 AM, Konrad Dybcio wrote:
On 11/15/23 17:20, Andrew Lunn wrote:
On Wed, Nov 15, 2023 at 11:25:14AM +0800, Luo Jie wrote:
The PHY & PCS clocks need to be enabled and the reset
sequence needs to be completed to make qca8084 PHY
probeable by MDIO bus.
Is all this guaranteed to be the same between different boards?
No, this looks like a total subsystem overreach, these should be
taken care of from within clk framework and consumed with the clk
APIs.
Konrad
Hi Konrad,
As Robert shared the link of the clock provider driver, which is
registered as MDIO device and not available until to the qca8084
initializations completed done here, so i need to do raw read/write
the clock registers in this patch.
