On 06/11/2023 09:55, Xianwei Zhao wrote: > Add the PLL clock controller dt-bindings for Amlogic C3 SoC family. > > Co-developed-by: Chuan Liu <chuan.liu@xxxxxxxxxxx> > Signed-off-by: Chuan Liu <chuan.liu@xxxxxxxxxxx> > Signed-off-by: Xianwei Zhao <xianwei.zhao@xxxxxxxxxxx> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
