On Tue, Oct 24, 2023 at 09:56:43AM +0200, Ante Knezic wrote: > On Mon, 23 Oct 2023 16:36:35 +0200, Oleksij Rempel wrote: > > If I see it correctly, in both cases there is only one bit to configure > > direction. The code need to support two interface modes: > > - PHY_INTERFACE_MODE_RMII (MAC mode) PLL is the clock provider. REFCLKO > > is used. > > - PHY_INTERFACE_MODE_REVRMII (PHY mode) PLL is not used, REFCLKI is the > clock provider. > > As you suggested, it looks like KSZ9897 clocking mode depends on RMII interface > mode (with strapping pins), but I don't see this for KSZ8863. The PHY/MAC mode > is selected with Register 0x35 bit 7 and the clocking mode is selected via > strapping pins EN_REFCLKO and SMTXD32 (and additional register 0xC6 bit 3). > I guess its possible for the KSZ8863 to be the clock provider/consumer > regardless of PHY/MAC mode? Register 0x35 bit 7 is for MII mode Register 0xC6 bit 3 is for RMII mode MII != RMII > Table 3-5: RMII CLOCK SETTING of KSZ8863 datasheet describes the available > clocking modes. If we try to create a relation between KSZ9897 and KSZ8863: > > KSZ9897 "Normal Mode" is equivalent to KSZ8863 mode described in first column > of table 3-5: > - EN_REFCLKO = 0, 0xC6(3) = 0 -> external 50Mhz OSC input to REFCLKI and X1 > pin directly > > KSZ9897 "Clock Mode" is equivalent to KSZ8863 mode described in fourth/fifth > column (difference is only clock frequency) of table 3-5: > - EN_REFCLKO = 1, 0xC6(3) = 1 -> 50/25Mhz on X1 pin, 50/25Mhz RMII clock goes > to REFCLKI internally. REFCLKI can be pulled down by resistor. > > That leaves us with additional columns 2 and 3 of table 3-5 for KSZ8863, that > are similar to KSZ9897 Clock mode, but REFCLKI needs to be fed externally from > REFCLKO. All of 5 variants described in "Table 3-5: RMII CLOCK SETTING of KSZ8863" can be boiled down to two main configurations: REFCLKI is used as clock source for internal MAC == Normal Mode or RevRMII mode. REFCLKI is not used as clock source for internal MAC == Clock Mode or RMII mode. Variants 1, 2, 3 describe only how can we feed REFCLKI from outside of the chip. Even variant 2 and 3 make the switch to be an actually physical clock provider, we still need to use REFCLKI and wire it outside of the chip which make it practically a Normal Mode or RevRMII mode. > > I already did some work to configure CPU interface, where which can be at least > > partially reused for your work: > > https://lore.kernel.org/all/20230517121034.3801640-2-o.rempel@xxxxxxxxxxxxxx/ > > (Looks I forgot to complete mainlining for this patch) > > > > If implanted as described, no new devicetree properties will be needed. > > I don't quite get how the proposed patch might effect this topic? You will need to add ksz8_phylink_mac_link_up() as this patch already dose. > By setting PHY/MAC mode? As noted, I dont see the same relation between clock and > MII mode for KSZ8863 as for KSZ9897? I hope current mail will clear it. Regards, Oleksij -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
