> -----Original Message----- > From: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> > Sent: Wednesday, October 18, 2023 3:17 PM > To: linux-rockchip@xxxxxxxxxxxxxxxxxxx > Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; > linux-pm@xxxxxxxxxxxxxxx; Heiko Stuebner <heiko@xxxxxxxxx>; Chanwoo Choi > <chanwoo@xxxxxxxxxx>; Kyungmin Park <kyungmin.park@xxxxxxxxxxx>; MyungJoo > Ham <myungjoo.ham@xxxxxxxxxxx>; Will Deacon <will@xxxxxxxxxx>; Mark > Rutland <mark.rutland@xxxxxxx>; kernel@xxxxxxxxxxxxxx; Michael Riesch > <michael.riesch@xxxxxxxxxxxxxx>; Robin Murphy <robin.murphy@xxxxxxx>; > Vincent Legoll <vincent.legoll@xxxxxxxxx>; Rob Herring > <robh+dt@xxxxxxxxxx>; Krzysztof Kozlowski > <krzysztof.kozlowski+dt@xxxxxxxxxx>; Conor Dooley <conor+dt@xxxxxxxxxx>; > devicetree@xxxxxxxxxxxxxxx; Sebastian Reichel > <sebastian.reichel@xxxxxxxxxxxxx>; Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>; > Chanwoo Choi <cw00.choi@xxxxxxxxxxx> > Subject: [PATCH v8 09/26] PM / devfreq: rockchip-dfi: Clean up DDR type > register defines > > Use the HIWORD_UPDATE() define known from other rockchip drivers to make > the defines look less odd to the readers who've seen other rockchip > drivers. > > The HIWORD registers have their functional bits in the lower 16 bits > whereas the upper 16 bits contain a mask. Only the functional bits that > have the corresponding mask bit set are modified during a write. Although > the register writes look different, the end result should be the same, at > least there's no functional change intended with this patch. > > Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> > Reviewed-by: Sebastian Reichel <sebastian.reichel@xxxxxxxxxxxxx> > Acked-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx> > --- > drivers/devfreq/event/rockchip-dfi.c | 33 ++++++++++++++++++---------- > 1 file changed, 21 insertions(+), 12 deletions(-) > > diff --git a/drivers/devfreq/event/rockchip-dfi.c > b/drivers/devfreq/event/rockchip-dfi.c > index 82d18c60538a5..12f9096879235 100644 > --- a/drivers/devfreq/event/rockchip-dfi.c > +++ b/drivers/devfreq/event/rockchip-dfi.c > @@ -26,15 +26,19 @@ > > #define DMC_MAX_CHANNELS 2 > > +#define HIWORD_UPDATE(val, mask) ((val) | (mask) << 16) > + > /* DDRMON_CTRL */ > #define DDRMON_CTRL 0x04 > -#define CLR_DDRMON_CTRL (0x1f0000 << 0) > -#define LPDDR4_EN (0x10001 << 4) > -#define HARDWARE_EN (0x10001 << 3) > -#define LPDDR3_EN (0x10001 << 2) > -#define SOFTWARE_EN (0x10001 << 1) > -#define SOFTWARE_DIS (0x10000 << 1) > -#define TIME_CNT_EN (0x10001 << 0) > +#define DDRMON_CTRL_DDR4 BIT(5) > +#define DDRMON_CTRL_LPDDR4 BIT(4) > +#define DDRMON_CTRL_HARDWARE_EN BIT(3) > +#define DDRMON_CTRL_LPDDR23 BIT(2) > +#define DDRMON_CTRL_SOFTWARE_EN BIT(1) > +#define DDRMON_CTRL_TIMER_CNT_EN BIT(0) > +#define DDRMON_CTRL_DDR_TYPE_MASK (DDRMON_CTRL_DDR4 | \ > + DDRMON_CTRL_LPDDR4 | \ > + DDRMON_CTRL_LPDDR23) > > #define DDRMON_CH0_COUNT_NUM 0x28 > #define DDRMON_CH0_DFI_ACCESS_NUM 0x2c > @@ -74,16 +78,20 @@ static void rockchip_dfi_start_hardware_counter(struct > devfreq_event_dev *edev) > void __iomem *dfi_regs = dfi->regs; > > /* clear DDRMON_CTRL setting */ > - writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL); > + writel_relaxed(HIWORD_UPDATE(0, DDRMON_CTRL_TIMER_CNT_EN | > DDRMON_CTRL_SOFTWARE_EN | > + DDRMON_CTRL_HARDWARE_EN), dfi_regs + DDRMON_CTRL); > > /* set ddr type to dfi */ > if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3) > - writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL); > + writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR23, > DDRMON_CTRL_DDR_TYPE_MASK), > + dfi_regs + DDRMON_CTRL); > else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4) > - writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL); > + writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR4, > DDRMON_CTRL_DDR_TYPE_MASK), > + dfi_regs + DDRMON_CTRL); > > /* enable count, use software mode */ > - writel_relaxed(SOFTWARE_EN, dfi_regs + DDRMON_CTRL); > + writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_SOFTWARE_EN, > DDRMON_CTRL_SOFTWARE_EN), > + dfi_regs + DDRMON_CTRL); > } > > static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev > *edev) @@ -91,7 +99,8 @@ static void > rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev) > struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev); > void __iomem *dfi_regs = dfi->regs; > > - writel_relaxed(SOFTWARE_DIS, dfi_regs + DDRMON_CTRL); > + writel_relaxed(HIWORD_UPDATE(0, DDRMON_CTRL_SOFTWARE_EN), > + dfi_regs + DDRMON_CTRL); > } > > static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, > struct dmc_count *count) > -- > 2.39.2 Applied it. Thanks Best Regards, Chanwoo Choi
