On 10/18/23 11:29, Varadarajan Narayanan wrote:
IPQ95xx SoCs have different OPPs available for the CPU based on SoC variant. This can be determined from an eFuse register present in the silicon. Add support to read the eFuse and populate the OPPs based on it. Frequency 1.2GHz 1.8GHz 1.5GHz No opp-supported-hw Limit ------------------------------------------------------------ 936000000 1 1 1 1 0xf 1104000000 1 1 1 1 0xf 1200000000 1 1 1 1 0xf 1416000000 0 1 1 1 0x7 1488000000 0 1 1 1 0x7 1800000000 0 1 0 1 0x5 2208000000 0 0 0 1 0x1 ----------------------------------------------------------- Signed-off-by: Kathiravan T <quic_kathirav@xxxxxxxxxxx> Signed-off-by: Varadarajan Narayanan <quic_varada@xxxxxxxxxxx> --- v2: cpu_speed_bin -> cpu-speed-bin in node name Move comment to commit log ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> Konrad
