Nam Cao wrote:
> The ss pin of spi0 is the same as sck pin. According to the
> visionfive 2 documentation, it should be pin 49 instead of 48.
Thanks! As far as I can tell this should make the 40pin header match the
Raspberry Pi layout, so
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@xxxxxxxxxxxxx>
>
> Fixes: 74fb20c8f05d ("riscv: dts: starfive: Add spi node and pins configuration")
> Signed-off-by: Nam Cao <namcao@xxxxxxxxxxxxxx>
> ---
> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> index 12ebe9792356..2c02358abd71 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> @@ -431,7 +431,7 @@ GPOEN_ENABLE,
> };
>
> ss-pins {
> - pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_FSS,
> + pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
> GPOEN_ENABLE,
> GPI_SYS_SPI0_FSS)>;
> bias-disable;
> --
> 2.39.2
>
