Export Zfh/Zfhmin ISA extensions[1] through hwprobe only if FPU support is available. [1] https://drive.google.com/file/d/1z3tQQLm5ALsAD77PM0l0CHnapxWCeVzP/view Signed-off-by: Clément Léger <cleger@xxxxxxxxxxxx> --- Documentation/riscv/hwprobe.rst | 6 ++++++ arch/riscv/include/uapi/asm/hwprobe.h | 2 ++ arch/riscv/kernel/sys_riscv.c | 5 +++++ 3 files changed, 13 insertions(+) diff --git a/Documentation/riscv/hwprobe.rst b/Documentation/riscv/hwprobe.rst index edfed33669ea..06f49a095f19 100644 --- a/Documentation/riscv/hwprobe.rst +++ b/Documentation/riscv/hwprobe.rst @@ -125,6 +125,12 @@ The following keys are defined: * :c:macro:`RISCV_HWPROBE_EXT_ZVKT`: The Zvkt extension is supported as defined in version 1.0 of the RISC-V Cryptography Extensions Volume II. + * :c:macro:`RISCV_HWPROBE_EXT_ZFH`: The Zfh extension version 1.0 is supported + as defined in the RISC-V ISA manual. + + * :c:macro:`RISCV_HWPROBE_EXT_ZFHMIN`: The Zfhmin extension version 1.0 is + supported as defined in the RISC-V ISA manual. + * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance information about the selected set of processors. diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h index d868eb431cd6..c9016abf099e 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -45,6 +45,8 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_EXT_ZVKSH (1 << 19) #define RISCV_HWPROBE_EXT_ZVKSG (1 << 20) #define RISCV_HWPROBE_EXT_ZVKT (1 << 21) +#define RISCV_HWPROBE_EXT_ZFH (1 << 22) +#define RISCV_HWPROBE_EXT_ZFHMIN (1 << 23) #define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c index 4f5e51c192d5..da916981934b 100644 --- a/arch/riscv/kernel/sys_riscv.c +++ b/arch/riscv/kernel/sys_riscv.c @@ -175,6 +175,11 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, CHECK_ISA_EXT(ZVKSG); CHECK_ISA_EXT(ZVKT); } + + if (has_fpu()) { + CHECK_ISA_EXT(ZFH); + CHECK_ISA_EXT(ZFHMIN); + } #undef CHECK_ISA_EXT } -- 2.42.0