Hi Conor,
On Mon, Oct 9, 2023 at 11:44 AM Conor Dooley <conor.dooley@xxxxxxxxxxxxx> wrote:
> Convert the RZ/Five devicetrees to use the new properties
> "riscv,isa-base" & "riscv,isa-extensions".
> For compatibility with other projects, "riscv,isa" remains.
>
> Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
Thanks for your patch!
> --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> @@ -24,6 +24,9 @@ cpu0: cpu@0 {
> reg = <0x0>;
> status = "okay";
> riscv,isa = "rv64imafdc";
> + riscv,isa-base = "rv64i";
> + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
> + "zifencei", "zihpm";
LGMT, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
I could not review the "zi*" parts, as the documentation that I have
does not mention these.
> mmu-type = "riscv,sv39";
> i-cache-size = <0x8000>;
> i-cache-line-size = <0x40>;
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
