On Fri, Sep 29, 2023 at 7:39 AM Claudiu <claudiu.beznea@xxxxxxxxx> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>
> RZ/G3S supports different drive strength values for different power sources
> and pin groups (A, B, C). On each group there could be up to 4 drive
> strength values per power source. Available power sources are 1v8, 2v5,
> 3v3. Drive strength values are fine tuned than what was previously
> available on the driver thus the necessity of having micro-amp support.
> As drive strength and power source values are linked together the
> hardware setup for these was moved at the end of
> rzg2l_pinctrl_pinconf_set() to ensure proper validation of the new
> values.
>
> The drive strength values are expected to be initialized though SoC
> specific hardware configuration data structure.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
> ---
>
> Changes in v2:
> - s/strenght/strength, s/togheter/together in commit description
> - got rid of RZG2L_INVALID_IOLH_VAL macro and consider zero as invalid
> value for entries in struct rzg2l_hwcfg::iolh_group[abc]_ua[] arrays
> - removed spinlock in rzg2l_[sg]et_power_source()
> - introduced caps_to_pwr_reg() and simplified the code in
> rzg2l_[sg]et_power_source()
> - changed return type of rzg2l_iolh_ua_to_val() to int and return
> -EINVAL on failure cases
> - s/rzg2l_ds_supported/rzg2l_ds_is_supported
> - inverted the logic in rzg2l_pinctrl_pinconf_set() when applying drive
> strength and power source to hardware registers and thus simplified the
> code
> - used devm_kcalloc() instead of devm_kzalloc()
> - adderessed the rest of the review comments
Thanks, will queue in renesas-pinctrl-for-v6.7, with Paul's comment
addresses.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
