In case the i.MX8MP DHCOM rev.100 has been populated on the PDK3 carrier board, the on-SoM PHY PHYAD1 signal has been pulled high by the carrier board and changed the PHY MDIO address from 5 to 7. This has been fixed on production rev.200 SoM by additional buffer on the SoM PHYAD/LED signals, remove the workaround. Signed-off-by: Marek Vasut <marex@xxxxxxx> --- Cc: Conor Dooley <conor+dt@xxxxxxxxxx> Cc: Fabio Estevam <festevam@xxxxxxxxx> Cc: Frieder Schrempf <frieder.schrempf@xxxxxxxxxx> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx> Cc: NXP Linux Team <linux-imx@xxxxxxx> Cc: Peng Fan <peng.fan@xxxxxxx> Cc: Pengutronix Kernel Team <kernel@xxxxxxxxxxxxxx> Cc: Rob Herring <robh+dt@xxxxxxxxxx> Cc: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> Cc: Shawn Guo <shawnguo@xxxxxxxxxx> Cc: devicetree@xxxxxxxxxxxxxxx Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx --- arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts index d4e95d640388d..b749e28e5ede5 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts @@ -212,10 +212,6 @@ i2cmuxed1: i2c@1 { /* HDMI DDC I2C */ }; }; -ðphy0g { - reg = <7>; -}; - &fec { /* Second ethernet */ pinctrl-0 = <&pinctrl_fec_rgmii>; phy-handle = <ðphypdk>; -- 2.40.1