On Thu, Sep 21, 2023 at 12:23:46AM +0200, Linus Walleij wrote:
> This makes it possible to provide basic clock output on pins
> 14 and 15. The clocks are typically used by random electronics,
> not modeled in the device tree, so they just need to be provided
> on request.
...
> + val = __raw_readl(g->base + IXP4XX_REG_GPCLK);
Do we need to read this...
> /*
> * Make sure GPIO 14 and 15 are NOT used as clocks but GPIO on
> * specific machines.
> */
> if (of_machine_is_compatible("dlink,dsm-g600-a") ||
> of_machine_is_compatible("iom,nas-100d"))
> - __raw_writel(0x0, g->base + IXP4XX_REG_GPCLK);
> + val = 0;
...if we are going to discard it anyway here?
Maybe
if (...)
val = 0;
else
val = readl();
?
...
> + /*
> + * Enable clock outputs with default timings of requested clock.
> + * If you need control over TC and DC, add these to the device
> + * tree bindings and use them here.
> + */
Shouldn't this be integrated into PPS subsystem?
--
With Best Regards,
Andy Shevchenko
