GCE has specific purpose registers, abbreviated as SPR. Client can us SPR to store data or programs. In CMDQ driver, it allows client to STORE or LOAD data into SPR. The value stored in SPR will be cleared after reset GCE HW thread. There are 4 SPR (register index 0 - 3) in every GCE HW thread. SPR is thread-independent and HW secure protected. Signed-off-by: Jason-JH.Lin <jason-jh.lin@xxxxxxxxxxxx> --- include/linux/soc/mediatek/mtk-cmdq.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 649955d2cf5c..f49ca8bd58e8 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -11,6 +11,11 @@ #include <linux/mailbox/mtk-cmdq-mailbox.h> #include <linux/timer.h> +#define CMDQ_THR_SPR_IDX0 0 +#define CMDQ_THR_SPR_IDX1 1 +#define CMDQ_THR_SPR_IDX2 2 +#define CMDQ_THR_SPR_IDX3 3 + #define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0))) #define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1)) -- 2.18.0
