From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
A recent submission [1] from Rob has added additionalProperties: false
to the interrupt-controller child node of RISC-V cpus, highlighting that
the D1 DT has been incorrectly using #address-cells since its
introduction. It has no child nodes, so #address-cells is not needed.
Remove it.
Fixes: 077e5f4f5528 ("riscv: dts: allwinner: Add the D1/D1s SoC devicetree")
Link: https://patchwork.kernel.org/project/linux-riscv/patch/20230915201946.4184468-1-robh@xxxxxxxxxx/ [1]
Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
---
CC: Rob Herring <robh+dt@xxxxxxxxxx>
CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>
CC: Conor Dooley <conor+dt@xxxxxxxxxx>
CC: Chen-Yu Tsai <wens@xxxxxxxx>
CC: Jernej Skrabec <jernej.skrabec@xxxxxxxxx>
CC: Samuel Holland <samuel@xxxxxxxxxxxx>
CC: devicetree@xxxxxxxxxxxxxxx
CC: linux-riscv@xxxxxxxxxxxxxxxxxxx
CC: linux-sunxi@xxxxxxxxxxxxxxx
CC: linux-kernel@xxxxxxxxxxxxxxx
---
arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
index 8275630af977..b8684312593e 100644
--- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
@@ -30,7 +30,6 @@ cpu0: cpu@0 {
cpu0_intc: interrupt-controller {
compatible = "riscv,cpu-intc";
interrupt-controller;
- #address-cells = <0>;
#interrupt-cells = <1>;
};
};
--
2.39.2
