From: Fabio Estevam <festevam@xxxxxxx> The JPEG decoder/encoder present in iMX8QXP and iMX8QM SoCs need the PER and IPG clocks to be functional, so add the clock entries. This also fixes the following schema warning: imx8qm-apalis-eval.dtb: jpegdec@58400000: 'assigned-clock-rates', 'assigned-clocks', 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/media/nxp,imx8-jpeg.yaml# Signed-off-by: Fabio Estevam <festevam@xxxxxxx> --- .../bindings/media/nxp,imx8-jpeg.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml index 3d9d1db37040..7899e17aff3a 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml @@ -31,6 +31,14 @@ properties: reg: maxItems: 1 + clocks: + maxItems: 2 + + clock-names: + items: + - const: per + - const: ipg + interrupts: description: | There are 4 slots available in the IP, which the driver may use @@ -49,6 +57,8 @@ properties: required: - compatible - reg + - clocks + - clock-names - interrupts - power-domains @@ -56,12 +66,16 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/imx8-lpcg.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/firmware/imx/rsrc.h> jpegdec: jpegdec@58400000 { compatible = "nxp,imx8qxp-jpgdec"; reg = <0x58400000 0x00050000 >; + clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, + <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; + clock-names = "per", "ipg"; interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, @@ -76,6 +90,9 @@ examples: jpegenc: jpegenc@58450000 { compatible = "nxp,imx8qm-jpgenc", "nxp,imx8qxp-jpgenc"; reg = <0x58450000 0x00050000 >; + clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>, + <&img_jpeg__lpcg IMX_LPCG_CLK_4>; + clock-names = "per", "ipg"; interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, -- 2.34.1
