On 20/12/14 20:07, Arnd Bergmann wrote: > On Wednesday 17 December 2014 15:01:29 Marc Zyngier wrote: >> >> Indeed, as described in the documentation: >> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0471b/CHDIFAEE.html >> >> Also it is worth noticing that given how GICV is placed, it will never >> work with 64K pages and virtualization. Pretty sad. > > Does this mean no VGIC support on this platform so you have to emulate it > in order to run virtual machines with 64K pages, or does it mean that > it's impossible to use that way because you can't emulate it? As Peter said, this is not a configuration we're willing to support: - we don't have a API to tell userspace emulation about interrupts generated by the generic timers - we could move the whole GIC emulation into the kernel (at the moment, only the distributor is there), but that would be a complete nightmare It really looks like a case of "let's drop a bunch of 64bit cores into an existing SoC". Shame people can't read integration guidelines... M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html