AM62A SoCs have a single R5F core in the MCU voltage domain. The MCU
domain also has a 512KB sram memory, the R5F core can use for
applications needing fast memory access.
Signed-off-by: Hari Nagalla <hnagalla@xxxxxx>
---
Changes since v1:
- Divided the remote proc patch into separate per domain patch
arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 35 ++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
index a6d16a94088c..cce08a85ad3b 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
@@ -6,6 +6,17 @@
*/
&cbass_mcu {
+ mcu_ram: sram@79100000 {
+ compatible = "mmio-sram";
+ reg = <0x00 0x79100000 0x00 0x80000>;
+ ranges = <0x00 0x00 0x79100000 0x80000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mcu_sram1@0 {
+ reg = <0x0 0x80000>;
+ };
+ };
mcu_pmx0: pinctrl@4084000 {
compatible = "pinctrl-single";
reg = <0x00 0x04084000 0x00 0x88>;
@@ -167,4 +178,28 @@ mcu_mcan1: can@4e18000 {
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
status = "disabled";
};
+
+ mcu_r5fss0: r5fss@79000000 {
+ compatible = "ti,am62-r5fss";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x79000000 0x00 0x79000000 0x8000>,
+ <0x79020000 0x00 0x79020000 0x8000>;
+ power-domains = <&k3_pds 7 TI_SCI_PD_EXCLUSIVE>;
+ mcu_r5fss0_core0: r5f@79000000 {
+ compatible = "ti,am62-r5f";
+ reg = <0x79000000 0x00008000>,
+ <0x79020000 0x00008000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <9>;
+ ti,sci-proc-ids = <0x03 0xff>;
+ resets = <&k3_reset 9 1>;
+ firmware-name = "am62a-mcu-r5f0_0-fw";
+ ti,atcm-enable = <0>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <0>;
+ sram = <&mcu_ram>;
+ };
+ };
};
--
2.34.1
