On 00:26-20230808, Apurva Nandan wrote: > Add bootph-pre-ram property for all the nodes used in SPL stage, > for syncing it later to u-boot j784s4 dts. > > Signed-off-by: Apurva Nandan <a-nandan@xxxxxx> > --- We need to rework this a little more: The approach taken in this series is enable pre-ram for everything. I am not sure that is the right direction. https://github.com/devicetree-org/dt-schema/blob/e87ba2f515392c2a4694642063efb43023331ff6/dtschema/schemas/bootph.yaml#L70 patch #1: board generic changes: patch #1 patch #2-: board specific change (per board) Make sure you use the correct property and document why this is needed in the section added as well - esp for board generic changes introduced into SoC.dtsi files. > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > index 2ea0adae6832..aaec569fe91a 100644 > --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > @@ -6,6 +6,7 @@ > */ > > &cbass_main { > + bootph-pre-ram; Is this better done where the node is defined? > msmc_ram: sram@70000000 { > compatible = "mmio-sram"; > reg = <0x00 0x70000000 0x00 0x800000>; > @@ -670,6 +671,7 @@ main_sdhci1: mmc@4fb0000 { > }; > > main_navss: bus@30000000 { > + bootph-pre-ram; > compatible = "simple-bus"; > #address-cells = <2>; > #size-cells = <2>; > @@ -705,6 +707,7 @@ main_udmass_inta: msi-controller@33d00000 { > }; > > secure_proxy_main: mailbox@32c00000 { > + bootph-pre-ram; > compatible = "ti,am654-secure-proxy"; > #mbox-cells = <1>; > reg-names = "target_data", "rt", "scfg"; > -- > 2.34.1 > -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
