On Wed, Aug 02, 2023 at 11:31:38AM -0500, Bjorn Helgaas wrote:
> On Wed, Aug 02, 2023 at 11:57:47AM -0400, Frank Li wrote:
> > Introduce helper function dw_pcie_get_ltssm to retrieve SMLH_LTSS_STATE.
>
> s/dw_pcie_get_ltssm/dw_pcie_get_ltssm()/
>
> > Add callback .pme_turn_off and .exit_from_l2 for platform specific PME
> > handling.
> >
> > Add common dw_pcie_suspend(resume)_noirq() API to avoid duplicated code
> > in dwc pci host controller platform driver.
> >
> > Typical L2 entry workflow/dw_pcie_suspend_noirq()
> >
> > 1. Transmit PME turn off signal to PCI devices and wait for PME_To_Ack.
> > 2. Await link entering L2_IDLE state.
> >
> > Typical L2 exit workflow/dw_pcie_resume_noirq()
> >
> > 1. Issue exit from L2 command.
> > 2. Reinitialize PCI host.
> > 3. Wait for link to become active.
> >
> > Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
> > ---
> > Change from v6 to v7
> > - change according to Manivannan's comments.
> > fix sleep value 100 (should be 1000 for 1ms).
>
> > + * PCI Express Base Specification Rev 4.0 Section 5.3.3.2.1 PME
> > + * Synchronization Recommends 1ms to 10ms timeout to check L2 ready.
> > + */
> > + ret = read_poll_timeout(dw_pcie_get_ltssm, val, val == DW_PCIE_LTSSM_L2_IDLE,
> > + 1000, 10000, false, pci);
>
> Thanks for the spec citation. Can you please reference the current
> spec, i.e., "PCIe r6.0, sec 5.3.3.2.1".
>
> s/Recommends/recommends/
>
> It would really be great to have a #define for this since the bare
> numbers are not very meaningful and they're not specific to DWC so a
> #define would let us find similar situations in other drivers.
how about define as
#define PCI_PME_TO_L2_TIMEOUT 10000
ret = read_poll_timeout(dw_pcie_get_ltssm, val, val == DW_PCIE_LTSSM_L2_IDLE,
PCI_PME_TO_L2_TIMEOUT/10, PCI_PME_TO_L2_TIMEOUT, false, pci);
where is good place PCI_PME_TO_L2_TIMEOUT in?
pcie-designware.h or pci.h?
Frank
>
> Bjorn
