On 24/07/23 22:22, Nishanth Menon wrote:
On 18:50-20230721, Jayesh Choudhary wrote:
From: Siddharth Vadapalli <s-vadapalli@xxxxxx>
The system controller node manages the CTRL_MMR0 region.
Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@xxxxxx>
[j-choudhary@xxxxxx: Fix serdes_ln_ctrl node]
Signed-off-by: Jayesh Choudhary <j-choudhary@xxxxxx>
---
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 40 ++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index 11f163e5cadf..5a4da4eb8d3d 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -5,6 +5,10 @@
* Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include <dt-bindings/mux/mux.h>
+
+#include "k3-serdes.h"
+
&cbass_main {
msmc_ram: sram@70000000 {
compatible = "mmio-sram";
@@ -26,6 +30,42 @@ l3cache-sram@200000 {
};
};
+ scm_conf: syscon@100000 {
+ compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
Would'nt a simple-bus work?
https://lore.kernel.org/all/20230605205220.rjmcsi5tjn4auqa7@arose/
For serdes_ln_ctrl it will be okay but for phy_gmii_sel,
we have dependency on [1].
So I will drop main_cpsw node (patch 2/5) and then re-spin it with
"simple-bus" compatible.
CPSW node can be taken up later on when the driver changes are in.
[1]:
https://lore.kernel.org/all/b16568ec-0428-981b-01ca-571cc5d52704@xxxxxx/
Warm Regards,
Jayesh
