On 20-07-23, 11:10, Manivannan Sadhasivam wrote: > Minimum frequency of the "ice_core_clk" should be 75MHz as specified in the > downstream vendor devicetree. So fix it! > > https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LA.UM.7.3.r1-09300-sdm845.0/arch/arm64/boot/dts/qcom/sdm845.dtsi > > Fixes: 433f9a57298f ("arm64: dts: sdm845: add Inline Crypto Engine registers and clock") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > --- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index 9ed74bf72d05..89520a9fe1e3 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -2614,7 +2614,7 @@ ufs_mem_hc: ufshc@1d84000 { > <0 0>, > <0 0>, > <0 0>, > - <0 300000000>; > + <75000000 300000000>; > > status = "disabled"; > }; Please keep new feature and fixes like this in separate series. This could be merged directly in the currently ongoing kernel rc and doesn't need to wait for this series. Or at least keep the commit at the top, so another maintainer can simply pick it. -- viresh
