Add the compatible "intel,socfpga-stratix10-hsotg" to the DWC2
implementation, because the Stratix DWC2 implementation does
not support clock gating. This compatible is used with generic
snps,dwc2.
Signed-off-by: Meng Li <Meng.Li@xxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/usb/dwc2.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml
index dc4988c0009c..f90094320914 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.yaml
+++ b/Documentation/devicetree/bindings/usb/dwc2.yaml
@@ -51,6 +51,7 @@ properties:
- amlogic,meson-g12a-usb
- amlogic,meson-a1-usb
- intel,socfpga-agilex-hsotg
+ - intel,socfpga-stratix10-hsotg
- const: snps,dwc2
- const: amcc,dwc-otg
- const: apm,apm82181-dwc-otg
--
2.34.1
