On Tue, 4 Jul 2023 at 08:49, Xingyu Wu <xingyu.wu@xxxxxxxxxxxxxxxx> wrote: > > From: William Qiu <william.qiu@xxxxxxxxxxxxxxxx> > > Add documentation to describe StarFive System Controller Registers. > Reviewed-by: Emil Renner Berthing <emil.renner.berthing@xxxxxxxxxxxxx> > Co-developed-by: Xingyu Wu <xingyu.wu@xxxxxxxxxxxxxxxx> > Signed-off-by: Xingyu Wu <xingyu.wu@xxxxxxxxxxxxxxxx> > Signed-off-by: William Qiu <william.qiu@xxxxxxxxxxxxxxxx> > --- > .../soc/starfive/starfive,jh7110-syscon.yaml | 93 +++++++++++++++++++ > MAINTAINERS | 7 ++ > 2 files changed, 100 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml > > diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml > new file mode 100644 > index 000000000000..0039319e91fe > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml > @@ -0,0 +1,93 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: StarFive JH7110 SoC system controller > + > +maintainers: > + - William Qiu <william.qiu@xxxxxxxxxxxxxxxx> > + > +description: > + The StarFive JH7110 SoC system controller provides register information such > + as offset, mask and shift to configure related modules such as MMC and PCIe. > + > +properties: > + compatible: > + oneOf: > + - items: > + - const: starfive,jh7110-sys-syscon > + - const: syscon > + - const: simple-mfd > + - items: > + - enum: > + - starfive,jh7110-aon-syscon > + - starfive,jh7110-stg-syscon > + - const: syscon > + > + reg: > + maxItems: 1 > + > + clock-controller: > + $ref: /schemas/clock/starfive,jh7110-pll.yaml# > + type: object > + > + "#power-domain-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: starfive,jh7110-sys-syscon > + then: > + required: > + - clock-controller > + else: > + properties: > + clock-controller: false > + - if: > + properties: > + compatible: > + contains: > + const: starfive,jh7110-aon-syscon > + then: > + required: > + - "#power-domain-cells" > + else: > + properties: > + "#power-domain-cells": false > + > +additionalProperties: false > + > +examples: > + - | > + syscon@10240000 { > + compatible = "starfive,jh7110-stg-syscon", "syscon"; > + reg = <0x10240000 0x1000>; > + }; > + > + syscon@13030000 { > + compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd"; > + reg = <0x13030000 0x1000>; > + > + clock-controller { > + compatible = "starfive,jh7110-pll"; > + clocks = <&osc>; > + #clock-cells = <1>; > + }; > + }; > + > + syscon@17010000 { > + compatible = "starfive,jh7110-aon-syscon", "syscon"; > + reg = <0x17010000 0x1000>; > + #power-domain-cells = <1>; > + }; > + > +... > diff --git a/MAINTAINERS b/MAINTAINERS > index 35e19594640d..58ba04bd0bc8 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -20127,6 +20127,12 @@ S: Supported > F: Documentation/devicetree/bindings/mmc/starfive* > F: drivers/mmc/host/dw_mmc-starfive.c > > +STARFIVE JH7110 SYSCON > +M: William Qiu <william.qiu@xxxxxxxxxxxxxxxx> > +M: Xingyu Wu <xingyu.wu@xxxxxxxxxxxxxxxx> > +S: Supported > +F: Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml > + > STARFIVE JH71X0 CLOCK DRIVERS > M: Emil Renner Berthing <kernel@xxxxxxxx> > M: Hal Feng <hal.feng@xxxxxxxxxxxxxxxx> > @@ -20164,6 +20170,7 @@ STARFIVE SOC DRIVERS > M: Conor Dooley <conor@xxxxxxxxxx> > S: Maintained > T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ > +F: Documentation/devicetree/bindings/soc/starfive/ > F: drivers/soc/starfive/ > > STARFIVE TRNG DRIVER > -- > 2.25.1 >
