On 12/07/2023 02:04, Konrad Dybcio wrote:
On 12.07.2023 01:01, Dmitry Baryshkov wrote:
On Wed, 12 Jul 2023 at 01:59, Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> wrote:
On 12.07.2023 00:39, Dmitry Baryshkov wrote:
On 12/07/2023 00:36, Konrad Dybcio wrote:
On 9.07.2023 06:19, Dmitry Baryshkov wrote:
Add the nb7vpq904m, onboard USB-C redriver / retimer.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
[...]
+ port@1 {
+ reg = <1>;
+
+ redriver_phy_con_ss: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_typec_mux_in>;
+ data-lanes = <0 1 2 3>;
That's USB+DP lines combined, or how does it work? I'm confused :/
4 generic purpose SS lanes, which can be purposed for USB or for DP.
Okay, so my gut did better than my brain.
Other than that, I'm reading the bindings and it looks like ports 0 and
1 may possibly be swapped?
Yes. But if I get schematics right, the lanes are not swapped in this case.
I'm not talking about the 0123-3210 swap, but rather in/out being swapped.
Unless I'm reading the bindings wrong (or they may be written in a
confusing way).
Hmm, no. port@0 goes to the connector, port@1 to SS PHY, port@2 to SBU
source.
Konrad
Konrad
Konrad
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ redriver_usb_con_sbu: endpoint {
+ remote-endpoint = <&pm8150b_typec_sbu_out>;
+ };
+ };
+ };
+ };
};
&mdss {
@@ -1294,7 +1334,7 @@ &usb_1_qmpphy {
};
&usb_1_qmpphy_typec_mux_in {
- remote-endpoint = <&pm8150b_typec_mux_out>;
+ remote-endpoint = <&redriver_phy_con_ss>;
};
&usb_2 {
@@ -1382,7 +1422,15 @@ pm8150b_role_switch_out: endpoint {
port@1 {
reg = <1>;
pm8150b_typec_mux_out: endpoint {
- remote-endpoint = <&usb_1_qmpphy_typec_mux_in>;
+ remote-endpoint = <&redriver_usb_con_ss>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ pm8150b_typec_sbu_out: endpoint {
+ remote-endpoint = <&redriver_usb_con_sbu>;
};
};
};
--
With best wishes
Dmitry
