On 5.07.2023 10:17, Mrinmay Sarkar wrote:
> Enable pcie0, pcie1 nodes and their respective phy's.
>
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@xxxxxxxxxxx>
> ---
grep for '&[a-z0-9]\{' and please fix all missing spaces before the
opening braces.
Konrad
> arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 68 +++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
> index ab767cfa51ff..4a39294259fe 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
> @@ -443,6 +443,74 @@ qup_uart17_rx: qup0-uart17-rx-pins {
> bias-pull-down;
> };
> };
> +
> + pcie0_default_state: pcie0-default {
> + perst {
> + pins = "gpio2";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + clkreq {
> + pins = "gpio1";
> + function = "pcie0_clkreq";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + wake {
> + pins = "gpio0";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> + };
> +
> + pcie1_default_state: pcie1-default {
> + perst {
> + pins = "gpio4";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + clkreq {
> + pins = "gpio3";
> + function = "pcie1_clkreq";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + wake {
> + pins = "gpio5";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> + };
> +};
> +
> +&pcie0{
> + status = "okay";
> +};
> +
> +&pcie1{
> + status = "okay";
> +};
> +
> +&pcie0_phy{
> + vdda-phy-supply = <&vreg_l5a>;
> + vdda-pll-supply = <&vreg_l1c>;
> +
> + status = "okay";
> +};
> +
> +&pcie1_phy{
> + vdda-phy-supply = <&vreg_l5a>;
> + vdda-pll-supply = <&vreg_l1c>;
> +
> + status = "okay";
> };
>
> &uart10 {
