On 2023/7/2 6:01, Aurelien Jarno wrote:
> On 2023-03-22 17:48, Walker Chen wrote:
>> Add the dma controller node for the Starfive JH7110 SoC.
>>
>> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@xxxxxxxxxxxxx>
>> Signed-off-by: Walker Chen <walker.chen@xxxxxxxxxxxxxxxx>
>> ---
>> arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 ++++++++++++++++++
>> 1 file changed, 18 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> index 17220576b21c..b503b6137743 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> @@ -510,6 +510,24 @@
>> #gpio-cells = <2>;
>> };
>>
>> + dma: dma-controller@16050000 {
>> + compatible = "starfive,jh7110-axi-dma";
>> + reg = <0x0 0x16050000 0x0 0x10000>;
>> + clocks = <&stgcrg JH7110_STGCLK_DMA1P_AXI>,
>> + <&stgcrg JH7110_STGCLK_DMA1P_AHB>;
>> + clock-names = "core-clk", "cfgr-clk";
>> + resets = <&stgcrg JH7110_STGRST_DMA1P_AXI>,
>> + <&stgcrg JH7110_STGRST_DMA1P_AHB>;
>> + interrupts = <73>;
>> + #dma-cells = <1>;
>> + dma-channels = <4>;
>> + snps,dma-masters = <1>;
>> + snps,data-width = <3>;
>> + snps,block-size = <65536 65536 65536 65536>;
>> + snps,priority = <0 1 2 3>;
>> + snps,axi-max-burst-len = <16>;
>> + };
>> +
>> aoncrg: clock-controller@17000000 {
>> compatible = "starfive,jh7110-aoncrg";
>> reg = <0x0 0x17000000 0x0 0x10000>;
>
> It appears that this patch has never been applied, although the rest of
> the series has already been merged. Unfortunately it doesn't apply
> anymore due to other changes to that file.
>
> Could you please rebase and repost it?
>
Of course I will repost it, but this depends on whether the stg clock is merged.
Regards,
Walker
