On 28/06/2023 18:31, Eric Lin wrote: >>>> >>>>> + - enum: >>>>> + - sifive,pL2Cache0 >>>>> + - sifive,pL2Cache1 >>>> >>>> What is "0" and "1" here? What do these compatibles represent? Why they >>>> do not have any SoC related part? >>> >>> The pL2Cache1 has minor changes in hardware, but it can use the same >>> pl2 cache driver. >> >> Then why aren't they compatible? >> > > The pL2Cache1 has removed some unused bits in the register compared to > pl2Cache0. > From the hardware perspective, they are not compatible but they can > share the same pl2 cache driver in software. So they are compatible... If they were not compatible, you wouldn't be able to use the same match in the driver. > Thus, we would like to keep both. It would be great if you can provide > some suggestions. Thanks. I propose to make them compatible, like every other piece of SoC. I don't see any benefit of having them separate. Best regards, Krzysztof
