Hi Christophe
On 6/23/23 10:59, Christophe Parant wrote:
Hello maintainers,
I would like to know if you have seen my request below ?
Thank you.
Best regards,
Christophe
Le mardi 23 mai 2023 à 16:58 +0200, Christophe Parant a écrit :
Hi Steffen,
Thank you for upstreaming our phyBOARD-Sargas device tree. We were
also
planing to work on that too.
If this patch is not applied upstream yet, would it be possible to
rename the .dts file ?
In the beginning, we named the dts files after our Yocto machines,
which is probably the version you got. But now we renamed them after
our baseboard names, like with our other platforms.
So it would make sense to have the stm32 baseboard named the same
way,
changing "stm32mp157c-phycore-stm32mp1-3.dts" to "stm32mp157c-
phyboard-
sargas-rdk-emmc.dts".
It has been sent with the old name. If it is really needed you need to
send a patch (yaml + DT update) with a fixes tag. I'll send it to
arm-soc during v6.5 rc cycle.
Alex
"model" and "compatible" can also be modified this way with this
naming
convention :
/ {
model = "PHYTEC phyBOARD-Sargas STM32MP157C with eMMC";
compatible = "phytec,stm32mp157c-phyboard-sargas-rdk-emmc",
"phytec,stm32mp157c-phycore-som", "st,stm32mp157";
};
Thanks.
Best regards,
Christophe Parant
Le vendredi 05 mai 2023 à 08:01 +0200, Steffen Trumtrar a écrit :
Add the Phytec STM32MP1-3 Dev board. The devboard uses a Phytec
stm32m157c-som.
Signed-off-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
---
Notes:
Changes since v7:
- remove secure-status for sdmmc
arch/arm/boot/dts/Makefile | 3 +-
.../dts/stm32mp157c-phycore-stm32mp1-3.dts | 60
+++++++++++++++++++
2 files changed, 62 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/stm32mp157c-phycore-stm32mp1-
3.dts
diff --git a/arch/arm/boot/dts/Makefile
b/arch/arm/boot/dts/Makefile
index efe4152e5846..dfa9a7477c82 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1252,7 +1252,8 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32mp157c-ev1.dtb \
stm32mp157c-ev1-scmi.dtb \
stm32mp157c-lxa-mc1.dtb \
- stm32mp157c-odyssey.dtb
+ stm32mp157c-odyssey.dtb \
+ stm32mp157c-phycore-stm32mp1-3.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
sun4i-a10-ba10-tvbox.dtb \
diff --git a/arch/arm/boot/dts/stm32mp157c-phycore-stm32mp1-3.dts
b/arch/arm/boot/dts/stm32mp157c-phycore-stm32mp1-3.dts
new file mode 100644
index 000000000000..28d7203264ce
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157c-phycore-stm32mp1-3.dts
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
+ * Author: Dom VOVARD <dom.vovard@xxxxxxxxx>.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/pinctrl/stm32-pinfunc.h>
+#include "stm32mp157.dtsi"
+#include "stm32mp15xc.dtsi"
+#include "stm32mp15xxac-pinctrl.dtsi"
+#include "stm32mp157c-phycore-stm32mp15-som.dtsi"
+
+/ {
+ model = "PHYTEC phyCORE-STM32MP1-3 Dev Board";
+ compatible = "phytec,phycore-stm32mp1-3",
+ "phytec,phycore-stm32mp157c-som",
"st,stm32mp157";
+
+ aliases {
+ mmc0 = &sdmmc1;
+ mmc1 = &sdmmc2;
+ mmc2 = &sdmmc3;
+ serial0 = &uart4;
+ serial1 = &usart3;
+ serial2 = &usart1;
+ };
+};
+
+&cryp1 {
+ status = "okay";
+};
+
+&dts {
+ status = "okay";
+};
+
+&fmc {
+ status = "disabled";
+};
+
+&gpu {
+ status = "okay";
+};
+
+&i2c4_eeprom {
+ status = "okay";
+};
+
+&i2c4_rtc {
+ status = "okay";
+};
+
+&qspi {
+ status = "okay";
+};
+
+&sdmmc2 {
+ status = "okay";
+};
