Add device tree documentations for MT8188 VDOSYS1.
Signed-off-by: Hsiao Chien Sung <shawn.sung@xxxxxxxxxxxx>
---
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 1 +
.../display/mediatek/mediatek,ethdr.yaml | 5 +-
.../display/mediatek/mediatek,mdp-rdma.yaml | 5 +-
.../display/mediatek/mediatek,merge.yaml | 1 +
.../display/mediatek/mediatek,padding.yaml | 80 +++++++++++++++++++
5 files changed, 90 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index 536f5a5ebd24..642fa2e4736e 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -32,6 +32,7 @@ properties:
- mediatek,mt8183-mmsys
- mediatek,mt8186-mmsys
- mediatek,mt8188-vdosys0
+ - mediatek,mt8188-vdosys1
- mediatek,mt8192-mmsys
- mediatek,mt8195-vdosys1
- mediatek,mt8195-vppsys0
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
index 801fa66ae615..e3f740ab0564 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
@@ -23,7 +23,10 @@ description:
properties:
compatible:
- const: mediatek,mt8195-disp-ethdr
+ oneOf:
+ - enum:
+ - mediatek,mt8188-disp-ethdr
+ - mediatek,mt8195-disp-ethdr
reg:
maxItems: 7
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
index dd12e2ff685c..07c345fa9178 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
@@ -21,7 +21,10 @@ description:
properties:
compatible:
- const: mediatek,mt8195-vdo1-rdma
+ oneOf:
+ - enum:
+ - mediatek,mt8188-vdo1-rdma
+ - mediatek,mt8195-vdo1-rdma
reg:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml
index 2f8e2f4dc3b8..600f1b4608f8 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml
@@ -23,6 +23,7 @@ properties:
oneOf:
- enum:
- mediatek,mt8173-disp-merge
+ - mediatek,mt8188-disp-merge
- mediatek,mt8195-disp-merge
reg:
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml
new file mode 100644
index 000000000000..8a9e74cbf6dc
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/mediatek/mediatek,padding.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek PADDING
+
+maintainers:
+ - Chun-Kuang Hu <chunkuang.hu@xxxxxxxxxx>
+ - Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
+
+description:
+ MediaTek PADDING provides ability to VDOSYS1 to fill pixels to
+ width and height of a layer with a specified color.
+ Since MIXER in VDOSYS1 requires the width of a layer to be 2-pixel-align, or
+ 4-pixel-align when ETHDR is enabled, we need PADDING to deal with odd width.
+ Please notice that even if the PADDING is in bypass mode,
+ settings in the registers must be cleared to 0, otherwise
+ undeinfed behaviors could happen.
+
+properties:
+ compatible:
+ const: mediatek,mt8188-vdo1-padding
+
+ reg:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: RDMA Clock
+
+ mediatek,gce-client-reg:
+ description:
+ The register of display function block to be set by gce. There are 4 arguments,
+ such as gce node, subsys id, offset and register size. The subsys id that is
+ mapping to the register of display function blocks is defined in the gce header
+ include/dt-bindings/gce/<chip>-gce.h of each chips.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ items:
+ - description: phandle of GCE
+ - description: GCE subsys id
+ - description: register offset
+ - description: register size
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - power-domains
+ - clocks
+ - mediatek,gce-client-reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/mt8188-clk.h>
+ #include <dt-bindings/power/mt8188-power.h>
+ #include <dt-bindings/gce/mt8188-gce.h>
+ #include <dt-bindings/memory/mt8188-memory-port.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ vdo1_padding0: vdo1_padding0@1c11d000 {
+ compatible = "mediatek,mt8188-vdo1-padding";
+ reg = <0 0x1c11d000 0 0x1000>;
+ clocks = <&vdosys1 CLK_VDO1_PADDING0>;
+ power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS1>;
+ mediatek,gce-client-reg =
+ <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>;
+ };
+ };
--
2.18.0
