On Fri, Jun 02, 2023 at 06:39:22PM +0200, Torsten Duwe wrote: > On Tue, 23 May 2023 10:56:43 +0800 > Xingyu Wu <xingyu.wu@xxxxxxxxxxxxxxxx> wrote: > > > On 2023/5/19 22:16, Conor Dooley wrote: > > > On Fri, May 19, 2023 at 03:57:33PM +0200, Torsten Duwe wrote: > > >> On Fri, May 12, 2023 at 10:20:30AM +0800, Xingyu Wu wrote: > > >> [...] > > >> > #ifndef __DT_BINDINGS_CLOCK_STARFIVE_JH7110_CRG_H__ > > >> > #define __DT_BINDINGS_CLOCK_STARFIVE_JH7110_CRG_H__ > > >> > > > >> > +/* PLL clocks */ > > >> > +#define JH7110_CLK_PLL0_OUT 0 > > >> > +#define JH7110_CLK_PLL1_OUT 1 > > >> > +#define JH7110_CLK_PLL2_OUT 2 > > >> > > >> In U-Boot commit 58c9c60b Yanhong Wang added: > > >> > > >> + > > >> +#define JH7110_SYSCLK_PLL0_OUT 190 > > >> +#define JH7110_SYSCLK_PLL1_OUT 191 > > >> +#define JH7110_SYSCLK_PLL2_OUT 192 > > >> + > > >> +#define JH7110_SYSCLK_END 193 > > >> > > >> in that respective file. > > >> > > >> > +#define JH7110_PLLCLK_END 3 > > >> > + > > >> > /* SYSCRG clocks */ > > >> > #define JH7110_SYSCLK_CPU_ROOT 0 > > >> > > >> If the symbolic names referred to the same items, would it be possible > > >> to keep the two files in sync somehow? > > > > > > Ohh, that's not good.. If you pass the U-Boot dtb to Linux it won't > > > understand the numbering. The headers are part of the dt-binding :/ > > > > Because PLL driver is separated from SYSCRG drivers in Linux, > > Can you _please_ point me at that "PLL driver" "in Linux" ? It's patch 2 in this series: https://lore.kernel.org/linux-riscv/20230512022036.97987-1-xingyu.wu@xxxxxxxxxxxxxxxx/T/#m4b2d74c36b3bb961a1187ec5cda1a0a0de875f0e HTH, Conor. > I seem to be unable to find it. All I can see is a stub in > drivers/clk/starfive/clk-starfive-jh7110-sys.c, which simply > sets the PLLs to 1000, 1066 and 1188 MHz fixed, respectively. > > The comment above says > > | They will be dropped and registered in the PLL clock driver instead. > > and that's the one I'm looking for. > > Thanks, > > Torsten
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