On 29.05.2023 11:44, Luca Weiss wrote:
> Add the required config for the v1.1 MDP5 found on MSM8226.
>
> Signed-off-by: Luca Weiss <luca@xxxxxxxxx>
> ---
> drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c | 82 ++++++++++++++++++++++++++++++++
> 1 file changed, 82 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
> index 2eec2d78f32a..694d54341337 100644
> --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
> +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
> @@ -103,6 +103,87 @@ static const struct mdp5_cfg_hw msm8x74v1_config = {
> .max_clk = 200000000,
> };
>
> +static const struct mdp5_cfg_hw msm8x26_config = {
Luca, this patch looks good as-is (without diving into the values).
Dmitry, I see some things that we may improve here..
1. Rename msm8xab to msm89ab or something, it's really inconsistent
with other drivers
2. Some values seem very common / always constant.. perhaps we could
add some #defines like we do in DPU?
3. Can we add some magic defines to make flush_hw_mask non-cryptic?
4. We can probably use pointers in data structs and deduplicate identical
blocks!
Konrad
> + .name = "msm8x26",
> + .mdp = {
> + .count = 1,
> + .caps = MDP_CAP_SMP |
> + 0,
> + },
> + .smp = {
> + .mmb_count = 7,
> + .mmb_size = 4096,
> + .clients = {
> + [SSPP_VIG0] = 1,
> + [SSPP_DMA0] = 4,
> + [SSPP_RGB0] = 7,
> + },
> + },
> + .ctl = {
> + .count = 2,
> + .base = { 0x00500, 0x00600 },
> + .flush_hw_mask = 0x0003ffff,
> + },
> + .pipe_vig = {
> + .count = 1,
> + .base = { 0x01100 },
> + .caps = MDP_PIPE_CAP_HFLIP |
> + MDP_PIPE_CAP_VFLIP |
> + MDP_PIPE_CAP_SCALE |
> + MDP_PIPE_CAP_CSC |
> + 0,
> + },
> + .pipe_rgb = {
> + .count = 1,
> + .base = { 0x01d00 },
> + .caps = MDP_PIPE_CAP_HFLIP |
> + MDP_PIPE_CAP_VFLIP |
> + MDP_PIPE_CAP_SCALE |
> + 0,
> + },
> + .pipe_dma = {
> + .count = 1,
> + .base = { 0x02900 },
> + .caps = MDP_PIPE_CAP_HFLIP |
> + MDP_PIPE_CAP_VFLIP |
> + 0,
> + },
> + .lm = {
> + .count = 2,
> + .base = { 0x03100, 0x03d00 },
> + .instances = {
> + { .id = 0, .pp = 0, .dspp = 0,
> + .caps = MDP_LM_CAP_DISPLAY, },
> + { .id = 1, .pp = -1, .dspp = -1,
> + .caps = MDP_LM_CAP_WB },
> + },
> + .nb_stages = 2,
> + .max_width = 2048,
> + .max_height = 0xFFFF,
> + },
> + .dspp = {
> + .count = 1,
> + .base = { 0x04500 },
> + },
> + .pp = {
> + .count = 1,
> + .base = { 0x21a00 },
> + },
> + .intf = {
> + .base = { 0x00000, 0x21200 },
> + .connect = {
> + [0] = INTF_DISABLED,
> + [1] = INTF_DSI,
> + },
> + },
> + .perf = {
> + .ab_inefficiency = 100,
> + .ib_inefficiency = 200,
> + .clk_inefficiency = 125
> + },
> + .max_clk = 200000000,
> +};
> +
> static const struct mdp5_cfg_hw msm8x74v2_config = {
> .name = "msm8x74",
> .mdp = {
> @@ -1236,6 +1317,7 @@ static const struct mdp5_cfg_hw sdm660_config = {
>
> static const struct mdp5_cfg_handler cfg_handlers_v1[] = {
> { .revision = 0, .config = { .hw = &msm8x74v1_config } },
> + { .revision = 1, .config = { .hw = &msm8x26_config } },
> { .revision = 2, .config = { .hw = &msm8x74v2_config } },
> { .revision = 3, .config = { .hw = &apq8084_config } },
> { .revision = 6, .config = { .hw = &msm8x16_config } },
>
