On Fri, Nov 28, 2014 at 08:01:41AM +0100, Stefan Roese wrote: > On 28.11.2014 02:48, Huang Shijie wrote: > >On Thu, Nov 27, 2014 at 03:18:49PM +0100, Stefan Roese wrote: > >>This sentence "We support only one NAND chip now" is not true any more. > >>Multiple chips are supported. So lets remove this sentence to not > > > >The gpmi can only supports one chip. Of course, there are maybe two dies > >in this single chip. > > Now I'm a bit confused. The i.MX6 supports 4 chips select signals. And isn't > "two dies in this single chip" not practically the same as connecting 2 (or > more) chips (same device) to multiple chip selects of the SoC? Where is the > difference here? The "one chip" here is means the "one package" (TSOP or BGA ....). (In logic, "two dies in this single chip" is same as connecting 2 chips to the gpmi.) thanks Huang Shijie -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
