The final production baseboard had a different chip select than
earlier prototype boards. When the newer board was released,
the SPI stopped working because the wrong pin was used in the device
tree and conflicted with the UART RTS. Fix the pinmux for
production boards.
Fixes: 36ca3c8ccb53 ("arm64: dts: imx: Add Beacon i.MX8M Nano development kit")
Signed-off-by: Adam Ford <aford173@xxxxxxxxx>
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi
index 9e82069c941f..d38745237d3c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-beacon-baseboard.dtsi
@@ -63,25 +63,35 @@ reg_usb_otg_vbus: regulator-usb {
enable-active-high;
};
- sound {
- compatible = "fsl,imx-audio-wm8962";
- model = "wm8962-audio";
- audio-cpu = <&sai3>;
- audio-codec = <&wm8962>;
- audio-routing =
- "Headphone Jack", "HPOUTL",
- "Headphone Jack", "HPOUTR",
- "Ext Spk", "SPKOUTL",
- "Ext Spk", "SPKOUTR",
- "AMIC", "MICBIAS",
- "IN3R", "AMIC";
+ sound-wm8962 {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "wm8962";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,widgets = "Headphone", "Headphones",
+ "Microphone", "Headset Mic",
+ "Speaker", "Speaker";
+ simple-audio-card,routing = "Headphones", "HPOUTL",
+ "Headphones", "HPOUTR",
+ "Speaker", "SPKOUTL",
+ "Speaker", "SPKOUTR",
+ "Headset Mic", "MICBIAS",
+ "IN3R", "Headset Mic";
+ simple-audio-card,cpu {
+ sound-dai = <&sai3>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&wm8962>;
+ clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
+ frame-master;
+ bitclock-master;
+ };
};
};
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_espi2>;
- cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
status = "okay";
eeprom@0 {
@@ -142,6 +152,7 @@ wm8962: audio-codec@1a {
0x0000 /* 4:FN_DMICCDAT */
0x0000 /* 5:Default */
>;
+ #sound-dai-cells = <0>;
};
};
@@ -202,7 +213,7 @@ pinctrl_espi2: espi2grp {
MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
- MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41
+ MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x41
>;
};
--
2.39.2
