On 5/19/23 14:38, Marek Behún wrote:
> On Thu, 18 May 2023 14:58:00 +0200
> Andrew Lunn <andrew@xxxxxxx> wrote:
>
>>>>> + [MV88E6361] = {
>>>>> + .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6361,
>>>>> + .family = MV88E6XXX_FAMILY_6393,
>>>>> + .name = "Marvell 88E6361",
>>>>> + .num_databases = 4096,
>>>>> + .num_macs = 16384,
>>>>> + .num_ports = 11,
>>>>> + /* Ports 1, 2 and 8 are not routed */
>>>>> + .invalid_port_mask = BIT(1) | BIT(2) | BIT(8),
>>>>> + .num_internal_phys = 5,
>>>>
>>>> Which ports have internal PHYs? 2, 3, 4, 5, 6, 7 ? What does
>>>> mv88e6xxx_phy_is_internal() return for these ports, and
>>>> mv88e6xxx_get_capsmv88e6xxx_get_caps()? I'm wondering if you actually
>>>> need to list 8 here?
>>>
>>> Indeed there is something wrong here too. I need to tune
>>> mv88e6393x_phylink_get_caps to reflect 88E6361 differences.
>>>
>>> As stated above, port 3 to 7 are the ones with internal PHY.
>>> For mv88e6xxx_phy_is_internal, I see that it is merely comparing the port index
>>> to the number of internal phys, so in this case it would advertise (wrongly)
>>> that ports 0 to 4 have internal phys.
>>
>> Ports 1 and 2 should hopefully be protected by the
>> invalid_port_mask. It should not even be possible to create those
>> ports. port 0 is interesting, and possibly currently broken on
>> 6393. Please take a look at that.
>
> Why would port 0 be broken on 6393x ?
By "broken", I guess Andrew means that if we feed port 0 to
mv88e6xxx_phy_is_internal, it will return true, which is wrong since there is no
internal phy for port 0 on 6393X ?
>
> Marek
--
Alexis Lothoré, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
