From: Alexis Lothoré <alexis.lothore@xxxxxxxxxxx> This series brings initial support for Marvell 88E6361 switch. MV88E6361 is a 8 ports switch with 5 integrated Gigabit PHYs and 3 2.5Gigabit SerDes interfaces. It is in fact a new variant in the 88E639X/88E6193X/88E6191X family with a subset of existing features (e.g. reduced ports count, lower maximal speed for MII interfaces). Since said family is already well supported in mv88e6xxx driver, adding initial support for this new switch mostly consists in finding the ID exposed in its identification register, and then add a proper description in switch description tables in mv88e6xxx driver. This initial support has been tested with two samples of a custom board with the following hardware configuration: - a main CPU connected to MV88E6361 using port 0 as CPU port - port 9 wired to a SFP cage - port 10 wired to a G.Hn transceiver The following setup was used: PC <-ethernet-> (copper SFP) - Board 1 - (G.hn) <-phone line(RJ11)-> (G.hn) Board 2 The unit 1 has been configured to bridge SFP port and G.hn port together, which allowed to successfully ping Board 2 from PC. Alexis Lothoré (2): dt-bindings: net: dsa: marvell: add MV88E6361 switch to compatibility list net: dsa: mv88e6xxx: enable support for 88E6361 switch .../devicetree/bindings/net/dsa/marvell.txt | 2 +- drivers/net/dsa/mv88e6xxx/chip.c | 25 +++++++++++++++++++ drivers/net/dsa/mv88e6xxx/chip.h | 3 ++- drivers/net/dsa/mv88e6xxx/port.h | 1 + 4 files changed, 29 insertions(+), 2 deletions(-) -- 2.40.1