On 5/2/23 15:53, Michal Simek wrote:
From: Varalaxmi Bingi <varalaxmi.bingi@xxxxxxx> Setting default i2c clock frequency for Zynq to maximum rate of 400kHz. Current default value is 100kHz. Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi@xxxxxxx> Signed-off-by: Michal Simek <michal.simek@xxxxxxx> --- arch/arm/boot/dts/zynq-7000.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index cd9931f6bcbd..a7db3f3009f2 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -149,6 +149,7 @@ i2c0: i2c@e0004000 { clocks = <&clkc 38>; interrupt-parent = <&intc>; interrupts = <0 25 4>; + clock-frequency = <400000>; reg = <0xe0004000 0x1000>; #address-cells = <1>; #size-cells = <0>; @@ -160,6 +161,7 @@ i2c1: i2c@e0005000 { clocks = <&clkc 39>; interrupt-parent = <&intc>; interrupts = <0 48 4>; + clock-frequency = <400000>; reg = <0xe0005000 0x1000>; #address-cells = <1>; #size-cells = <0>;
Applied. M