Re: [PATCH v2 3/5] riscv: dts: thead: add sipeed Lichee Pi 4A board device tree

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On 10/05/2023 22:44, Yangtao Li wrote:
> From: Jisheng Zhang <jszhang@xxxxxxxxxx>
> 
> Sipeed's Lichee Pi 4A development board uses Lichee Module 4A core
> module which is powered by T-HEAD's light(a.k.a TH1520) SoC. Add
> minimal device tree files for the core module and the development
> board.
> 
> Support basic uart/gpio/dmac drivers, so supports booting to a basic
> shell.
> 
> Cc: Icenowy Zheng <uwu@xxxxxxxxxx>
> Cc: Wei Fu <wefu@xxxxxxxxxx>
> Signed-off-by: Jisheng Zhang <jszhang@xxxxxxxxxx>
> Signed-off-by: Yangtao Li <frank.li@xxxxxxxx>
> ---
> v2:
> -cleanup `light`
>  arch/riscv/boot/dts/Makefile                  |  1 +
>  arch/riscv/boot/dts/thead/Makefile            |  2 +
>  .../dts/thead/th1520-lichee-module-4a.dtsi    | 39 +++++++++++++++++++
>  .../boot/dts/thead/th1520-lichee-pi-4a.dts    | 33 ++++++++++++++++
>  4 files changed, 75 insertions(+)
>  create mode 100644 arch/riscv/boot/dts/thead/Makefile
>  create mode 100644 arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
>  create mode 100644 arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
> 
> diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile
> index f0d9f89054f8..1e884868ccba 100644
> --- a/arch/riscv/boot/dts/Makefile
> +++ b/arch/riscv/boot/dts/Makefile
> @@ -2,6 +2,7 @@
>  subdir-y += allwinner
>  subdir-y += sifive
>  subdir-y += starfive
> +subdir-y += thead
>  subdir-y += canaan
>  subdir-y += microchip
>  subdir-y += renesas
> diff --git a/arch/riscv/boot/dts/thead/Makefile b/arch/riscv/boot/dts/thead/Makefile
> new file mode 100644
> index 000000000000..e311fc9a5939
> --- /dev/null
> +++ b/arch/riscv/boot/dts/thead/Makefile
> @@ -0,0 +1,2 @@
> +# SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_THEAD) += th1520-lichee-pi-4a.dtb
> diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> new file mode 100644
> index 000000000000..bc5f8677d546
> --- /dev/null
> +++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
> @@ -0,0 +1,39 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2023 Jisheng Zhang <jszhang@xxxxxxxxxx>
> + * Copyright (C) 2023 Yangtao Li <frank.li@xxxxxxxx>
> + */
> +
> +/dts-v1/;
> +
> +#include "th1520.dtsi"
> +
> +/ {
> +	model = "Sipeed Lichee Module 4A";
> +	compatible = "sipeed,lichee-module-4a", "thead,th1520";
> +
> +	memory@0 {
> +		device_type = "memory";
> +		reg = <0x0 0x00000000 0x2 0x00000000>;
> +	};
> +};
> +
> +&osc {
> +	clock-frequency = <24000000>;
> +};
> +
> +&osc_32k {
> +	clock-frequency = <32768>;
> +};
> +
> +&apb_clk {
> +	clock-frequency = <62500000>;
> +};
> +
> +&uart_sclk {
> +	clock-frequency = <100000000>;
> +};
> +
> +&dmac0 {
> +	status = "okay";
> +};
> diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
> new file mode 100644
> index 000000000000..86d677175feb
> --- /dev/null
> +++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
> @@ -0,0 +1,33 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2023 Jisheng Zhang <jszhang@xxxxxxxxxx>
> + * Copyright (C) 2023 Yangtao Li <frank.li@xxxxxxxx>
> + */
> +
> +#include "th1520-lichee-module-4a.dtsi"
> +
> +/ {
> +	model = "Sipeed Lichee Pi 4A";
> +	compatible = "sipeed,lichee-pi-4a", "sipeed,lichee-module-4a", "thead,th1520";

Missing bindings.

Best regards,
Krzysztof




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