Re: (subset) [PATCH v4 4/4] drm: sun4i: calculate proper DCLK rate for DSI

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Subject: Re: (subset) [PATCH v4 4/4] drm: sun4i: calculate proper DCLK rate for DSI
From: Maxime Ripard <maxime@xxxxxxxxxx>
Date: Wed, 10 May 2023 16:04:05 +0200
Cc: Frank Oltmanns <frank@xxxxxxxxxxxx>, Icenowy Zheng <icenowy@xxxxxxx>, Ondrej Jirman <megi@xxxxxx>, devicetree@xxxxxxxxxxxxxxx, dri-devel@xxxxxxxxxxxxxxxxxxxxx, linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, linux-sunxi@xxxxxxxxxxxxxxx, linux-clk@xxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx
Feedback-id: i8771445c:Fastmail
In-reply-to: <20230505052110.67514-5-me@crly.cz>

On Fri, 05 May 2023 07:21:10 +0200, Roman Beranek wrote:
> In DSI mode, TCON0's data clock is required to run at 1/4 the per-lane
> bit rate.
> 
> 

Applied to drm/drm-misc (drm-misc-next).

Thanks!
Maxime

References:
- [PATCH v4 0/4] drm: sun4i: set proper TCON0 DCLK rate in DSI mode
  - From: Roman Beranek
- [PATCH v4 4/4] drm: sun4i: calculate proper DCLK rate for DSI
  - From: Roman Beranek

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