The xo clock being used everywhere actually goes via the RPM. Since the
rpmcc driver recently got support for this clock we can use this now.
Signed-off-by: Luca Weiss <luca@xxxxxxxxx>
---
arch/arm/boot/dts/qcom-msm8226.dtsi | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
index 42acb9ddb8cc..4dd4e26c73a2 100644
--- a/arch/arm/boot/dts/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
@@ -176,7 +176,7 @@ sdhc_1: mmc@f9824900 {
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_SDCC1_APPS_CLK>,
- <&xo_board>;
+ <&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface", "core", "xo";
pinctrl-names = "default";
pinctrl-0 = <&sdhc1_default_state>;
@@ -192,7 +192,7 @@ sdhc_2: mmc@f98a4900 {
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>,
- <&xo_board>;
+ <&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface", "core", "xo";
pinctrl-names = "default";
pinctrl-0 = <&sdhc2_default_state>;
@@ -208,7 +208,7 @@ sdhc_3: mmc@f9864900 {
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC3_AHB_CLK>,
<&gcc GCC_SDCC3_APPS_CLK>,
- <&xo_board>;
+ <&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface", "core", "xo";
pinctrl-names = "default";
pinctrl-0 = <&sdhc3_default_state>;
@@ -362,7 +362,8 @@ usb_hs_phy: phy {
compatible = "qcom,usb-hs-phy-msm8226",
"qcom,usb-hs-phy";
#phy-cells = <0>;
- clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+ <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
clock-names = "ref", "sleep";
resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
reset-names = "phy", "por";
@@ -617,7 +618,7 @@ adsp: remoteproc@fe200000 {
power-domains = <&rpmpd MSM8226_VDDCX>;
power-domain-names = "cx";
- clocks = <&xo_board>;
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "xo";
memory-region = <&adsp_region>;
--
2.40.1
