On Mon, May 8, 2023 at 5:22 AM Conor Dooley <conor@xxxxxxxxxx> wrote: > > On Mon, May 08, 2023 at 02:23:01AM +0800, Jisheng Zhang wrote: > > The first SoC in the T-HEAD series is light(a.k.a th1520), containing > > quad T-HEAD C910 cores. > > > > Signed-off-by: Jisheng Zhang <jszhang@xxxxxxxxxx> > > --- > > arch/riscv/Kconfig.socs | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > > index 1cf69f958f10..ce10a38dff37 100644 > > --- a/arch/riscv/Kconfig.socs > > +++ b/arch/riscv/Kconfig.socs > > @@ -41,6 +41,12 @@ config ARCH_SUNXI > > This enables support for Allwinner sun20i platform hardware, > > including boards based on the D1 and D1s SoCs. > > > > +config ARCH_THEAD > > Could you please add a defconfig patch, adding this option, so that we > build support for this platform by default? Yes, but it's another patch, see: 'commit eb20e7cb91ba ("riscv: defconfig: Enable the Allwinner D1 platform and drivers")' > > Thanks, > Conor. > > > + bool "T-HEAD RISC-V SoCs" > > + select ERRATA_THEAD > > + help > > + This enables support for the RISC-V based T-HEAD SoCs. > > + > > config ARCH_VIRT > > def_bool SOC_VIRT > > > > -- > > 2.40.0 > > -- Best Regards Guo Ren