Hey Jisheng,
On Mon, May 08, 2023 at 02:23:03AM +0800, Jisheng Zhang wrote:
> Sipeed's Lichee Pi 4A development board uses Lichee Module 4A core
> module which is powered by T-HEAD's light(a.k.a TH1520) SoC. Add
> minimal device tree files for the core module and the development
> board.
>
> Support basic uart/gpio/dmac drivers, so supports booting to a basic
> shell.
There are quite a lot of dtbs_check warnings etc produced by this patch.
RISC-V is *almost* W=1 clean for dtbs_check & I'd like to get that to
clean once the non-coherent DMA situation for Renesas is sorted out.
That said, I think some of the issues I noticed will crop up at the
default warning level too.
Please fix all of the W=1 complaints from dtbs_check, which will require
the creation of some additional dt-bindings.
>
> Signed-off-by: Jisheng Zhang <jszhang@xxxxxxxxxx>
> ---
> arch/riscv/boot/dts/Makefile | 1 +
> arch/riscv/boot/dts/thead/Makefile | 2 +
> .../dts/thead/light-lichee-module-4a.dtsi | 38 +++++++++++++++++++
> .../boot/dts/thead/light-lichee-pi-4a.dts | 32 ++++++++++++++++
> 4 files changed, 73 insertions(+)
> create mode 100644 arch/riscv/boot/dts/thead/Makefile
> create mode 100644 arch/riscv/boot/dts/thead/light-lichee-module-4a.dtsi
As I mentioned in one of the earlier patches, I don't think using
"light" here is all that great. I would much rather see "th1520" used
instead.
Thanks,
Conor.
> create mode 100644 arch/riscv/boot/dts/thead/light-lichee-pi-4a.dts
>
> diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile
> index f0d9f89054f8..1e884868ccba 100644
> --- a/arch/riscv/boot/dts/Makefile
> +++ b/arch/riscv/boot/dts/Makefile
> @@ -2,6 +2,7 @@
> subdir-y += allwinner
> subdir-y += sifive
> subdir-y += starfive
> +subdir-y += thead
> subdir-y += canaan
> subdir-y += microchip
> subdir-y += renesas
> diff --git a/arch/riscv/boot/dts/thead/Makefile b/arch/riscv/boot/dts/thead/Makefile
> new file mode 100644
> index 000000000000..9e00acc714cc
> --- /dev/null
> +++ b/arch/riscv/boot/dts/thead/Makefile
> @@ -0,0 +1,2 @@
> +# SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_THEAD) += light-lichee-pi-4a.dtb
> diff --git a/arch/riscv/boot/dts/thead/light-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/light-lichee-module-4a.dtsi
> new file mode 100644
> index 000000000000..24c9971e0fb5
> --- /dev/null
> +++ b/arch/riscv/boot/dts/thead/light-lichee-module-4a.dtsi
> @@ -0,0 +1,38 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2023 Jisheng Zhang <jszhang@xxxxxxxxxx>
> + */
> +
> +/dts-v1/;
> +
> +#include "light.dtsi"
> +
> +/ {
> + model = "Sipeed Lichee Module 4A";
> + compatible = "sipeed,lichee-module-4a", "thead,light";
> +
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x00000000 0x2 0x00000000>;
> + };
> +};
> +
> +&osc {
> + clock-frequency = <24000000>;
> +};
> +
> +&osc_32k {
> + clock-frequency = <32768>;
> +};
> +
> +&apb_clk {
> + clock-frequency = <62500000>;
> +};
> +
> +&uart_sclk {
> + clock-frequency = <100000000>;
> +};
> +
> +&dmac0 {
> + status = "okay";
> +};
> diff --git a/arch/riscv/boot/dts/thead/light-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/light-lichee-pi-4a.dts
> new file mode 100644
> index 000000000000..4f0ba2149d2d
> --- /dev/null
> +++ b/arch/riscv/boot/dts/thead/light-lichee-pi-4a.dts
> @@ -0,0 +1,32 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2023 Jisheng Zhang <jszhang@xxxxxxxxxx>
> + */
> +
> +#include "light-lichee-module-4a.dtsi"
> +
> +/ {
> + model = "Sipeed Lichee Pi 4A";
> + compatible = "sipeed,lichee-pi-4a", "sipeed,lichee-module-4a", "thead,light";
> +
> + aliases {
> + gpio0 = &gpio0;
> + gpio1 = &gpio1;
> + gpio2 = &gpio2;
> + gpio3 = &gpio3;
> + serial0 = &uart0;
> + serial1 = &uart1;
> + serial2 = &uart2;
> + serial3 = &uart3;
> + serial4 = &uart4;
> + serial5 = &uart5;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> --
> 2.40.0
>
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