This series adds hyperflash support for J721E. J721E SoC has HyperBus and OSPI controller muxed within the FSS subsystem and the J721E SoM has a 64 MiB S28 OSPI flash and a 64 MiB Hyperflash present which is muxed externally also. * Patch 1/4 adds the hyperbus controller nodes and fixes DT compile warnings. * Patch 2/4 adds the hyperflash support in the SoM DTS. * Patch 3 and 4/4 enables the pinmux for external mux that selects between hyperflash or OSPI NOR flash, this is done for J7200 and J721E platforms since it is required in U-Boot and helps keep the DT in sync. Patch 1/4 depends on the following patch: https://lore.kernel.org/all/20230424184810.29453-1-afd@xxxxxx/ Patch 3 depends on the below fix for pinmux offsets in J7200: https://lore.kernel.org/all/20230419040007.3022780-2-u-kumar1@xxxxxx/ Bootlog and basic hyperflash erase-write-read test: https://gist.github.com/vaishnavachath/be652108f3e360f1e2d41b499df844ef Thanks and Regards, Vaishnav Vaishnav Achath (4): arm64: dts: ti: k3-j721e-mcu-wakeup: Add HyperBus node arm64: dts: ti: k3-j721e-som-p0: Add HyperFlash node arm64: dts: ti: k3-j7200-common-proc-board: Add OSPI/Hyperflash select pinmux arm64: dts: ti: k3-j721e-common-proc-board: Add OSPI/Hyperflash select pinmux .../dts/ti/k3-j7200-common-proc-board.dts | 11 ++++++ .../dts/ti/k3-j721e-common-proc-board.dts | 11 ++++++ .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 25 +++++++++++-- arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 35 +++++++++++++++++++ 4 files changed, 80 insertions(+), 2 deletions(-) -- 2.17.1
