This series adds support for the clock and reset controller in the Nuvoton
WPCM450 SoC. This means that the clock rates for peripherals will be calculated
automatically based on the clock tree as it was preconfigured by the bootloader.
The 24 MHz dummy clock, that is currently in the devicetree, is no longer needed.
Somewhat unfortunately, this also means that there is a breaking change once
the devicetree starts relying on the clock driver, but I find it acceptable in
this case, because WPCM450 is still at a somewhat early stage.
v8:
- Use %pe throughout the driver
v7:
- Simplified the error handling, by largely removing resource
deallocation, which:
- was already incomplete
- would only happen in a case when the system is in pretty bad state
because the clock driver didn't initialize correctly (in other
words, the clock driver isn't optional enough that complex error
handling really pays off)
v6:
- Dropped all patches except the clock binding and the clock driver, because
they have mostly been merged
- Minor correction to how RESET_SIMPLE is selected
v5:
- Dropped patch 2 (watchdog: npcm: Enable clock if provided), which
was since merged upstream
- Added patch 2 (clocksource: timer-npcm7xx: Enable timer 1 clock before use) again,
because I wasn't able to find it in linux-next
- Switched the driver to using struct clk_parent_data
- Rebased on 6.1-rc3
v4:
- Leave WDT clock running during after restart handler
- Fix reset controller initialization
- Dropped patch 2/7 (clocksource: timer-npcm7xx: Enable timer 1 clock before use),
as it was applied by Daniel Lezcano
v3:
- https://lore.kernel.org/lkml/20220508194333.2170161-1-j.neuschaefer@xxxxxxx/
- Changed "refclk" string to "ref"
- Fixed some dead code in the driver
- Added clk_prepare_enable call to the watchdog restart handler
- Added a few review tags
v2:
- https://lore.kernel.org/lkml/20220429172030.398011-1-j.neuschaefer@xxxxxxx/
- various small improvements
v1:
- https://lore.kernel.org/lkml/20220422183012.444674-1-j.neuschaefer@xxxxxxx/
Jonathan Neuschäfer (2):
dt-bindings: clock: Add Nuvoton WPCM450 clock/reset controller
clk: wpcm450: Add Nuvoton WPCM450 clock/reset controller driver
.../bindings/clock/nuvoton,wpcm450-clk.yaml | 66 ++++
drivers/clk/Makefile | 1 +
drivers/clk/clk-wpcm450.c | 374 ++++++++++++++++++
drivers/reset/Kconfig | 2 +-
.../dt-bindings/clock/nuvoton,wpcm450-clk.h | 67 ++++
5 files changed, 509 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,wpcm450-clk.yaml
create mode 100644 drivers/clk/clk-wpcm450.c
create mode 100644 include/dt-bindings/clock/nuvoton,wpcm450-clk.h
--
2.39.2
