On Tue, Apr 18, 2023 at 6:53 AM Adam Ford <aford173@xxxxxxxxx> wrote:
>
> On Mon, Apr 17, 2023 at 2:00 AM Alexander Stein
> <alexander.stein@xxxxxxxxxxxxxxx> wrote:
> >
> > Hi,
> >
> > Am Montag, 17. April 2023, 00:31:24 CEST schrieb Adam Ford:
> > > On Sun, Apr 16, 2023 at 5:07 PM Marek Vasut <marex@xxxxxxx> wrote:
> > > > On 4/15/23 12:40, Adam Ford wrote:
> > > > > According to Table 13-45 of the i.MX8M Mini Reference Manual, the min
> > > > > and max values for M and the frequency range for the VCO_out
> > > > > calculator were incorrect. This also appears to be the case for the
> > > > > imx8mn and imx8mp.
> > > > >
> > > > > To fix this, make new variables to hold the min and max values of m
> > > > > and the minimum value of VCO_out, and update the PMS calculator to
> > > > > use these new variables instead of using hard-coded values to keep
> > > > > the backwards compatibility with other parts using this driver.
> > > >
> > > > [...]
> > > >
> > > > > static const struct samsung_dsim_driver_data imx8mm_dsi_driver_data =
> > > > > {
> > > > >
> > > > > @@ -470,6 +485,9 @@ static const struct samsung_dsim_driver_data
> > > > > imx8mm_dsi_driver_data = {> >
> > > > > */
> > > > >
> > > > > .pll_p_offset = 14,
> > > > > .reg_values = imx8mm_dsim_reg_values,
> > > > >
> > > > > + .m_min = 64,
> > > > > + .m_max = 1023,
> > > > > + .vco_min = 1050,
> > > >
> > > > You might want to call this 'min_freq' since there is a 'max_freq' which
> > > > seems to indicate what VCO max frequency is.
> > > >
> > > > Note that the same datasheet contains the following information:
> > > > "
> > > > MIPI_DPHY_M_PLLPMS field descriptions
> > > >
> > > > 12–4 PMS_M
> > > > Specifies the PLL PMS value for the M divider
> > > > NOTE: The programmable divider range should be within 25 to 125 to
> > > > ensure PLL stability.
> > >
> > > I was confused by this because this statement is not consistent with
> > > the link they reference jumps me to the table where it reads M is
> > > between 64 and 1023.
> > >
> > > > NOTE: The M and P divider values should be considered together to ensure
> > > > VCO ouput frequency
> > > > (VCO_out) range is between 350 MHz to 750 MHz.
> > > > Please refer to the topic DPHY PLL for more information.
> > >
> > > I was confused by this too, because the NXP documentation reads the
> > > 350 - 750MHz that you state, but "Table 13-45: DPHY PLL Parameters"
> > > which immediately follows that sentence on page 4158 shows VCO_out is
> > > between 1050-2100 MHz.
I reached out to my NXP rep asking if the VCO_out is 350-750 or if it
should be 1050-2100, and received the following statement:
" Yes it is definitely wrong, the one that is part of the NOTE in
MIPI_DPHY_M_PLLPMS register table against PMS_P, PMS_M and PMS_S is
not correct. I will report this to Doc team, the one customer should
be take into account is the Table 13-40 DPHY PLL Parameters and the
Note above."
Table 13-40 (for the Nano) reads the VCO_out is 1050-2100, despite
other text stating 350-750MHz, so I believe this patch is appropriate.
I'll add the above statement to the commit message as confirmation
when I submit a V2 of this series.
adam
> > >
> > > I compared the PMS values for a variety of frequencies to those that
> > > were set in the downstream NXP code, and the PMS values matched.
> > > Maybe someone from NXP can explain the discrepancy.
> >
> > Also note that, according to Table 13-28 in RM (Rev 2 07/2022) for i.MX8M
> > Nano, VCO_out and Fout has a maximum of 1500MHz only. Although the note above
> > mentions a range of 1050-2100MHz...
>
> I looked up the limits in NXP's downstream kernel [1] , and I believe
> these values match the table in the reference manual instead of the
> conflicting sentence. I am guessing this is why the PMS values I get
> match those of the NXP downstream kernel.
>
> adam
>
> [1] - https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/drivers/gpu/drm/imx/sec_mipi_pll_1432x.h#L38
>
> >
> > Best regards,
> > Alexander
> > --
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> >
> >
