Hi Biju,
On Mon, Apr 17, 2023 at 11:02 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> Enable mtu3 node using dt overlay and disable scif2 node and delete
> {sd1_mux,sd1_mux_uhs} nodes as the pins are shared with mtu3 external
> clock input pins and Z phase signal(MTIOC1A).
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Thanks for your patch!
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pmod.dtso
> @@ -0,0 +1,43 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK PMOD parts
Please add a comment here to document what exactly this provides.
> + *
> + * Copyright (C) 2023 Renesas Electronics Corp.
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> +
> +&mtu3 {
> + pinctrl-0 = <&mtu3_pins>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +};
> +
> +&pinctrl {
> + mtu3_pins: mtu3 {
> + mtu3-zphase-clk {
> + pinmux = <RZG2L_PORT_PINMUX(19, 0, 3)>; /* MTIOC1A */
> + };
Unless I'm missing something, this signal is not available on the PMOD
connector?
> +
> + mtu3-ext-clk-input-pin {
> + pinmux = <RZG2L_PORT_PINMUX(48, 0, 4)>, /* MTCLKA */
> + <RZG2L_PORT_PINMUX(48, 1, 4)>; /* MTCLKB */
> + };
So this provides two external clock inputs on the pins on the PMOD
connector that usually provides a UART?
> + };
> +};
> +
> +&scif2 {
> + status = "disabled";
> +};
> +
> +&sdhi1_pins {
> + /delete-node/ sd1_mux;
> +};
> +
> +&sdhi1_pins_uhs {
> + /delete-node/ sd1_mux_uhs;
> +};
As you disable CD functionality, don't you need to add "broken-cd" to
the sdhi1 node?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
