Subject: [PATCH v1 2/2] arm64: dts: realtek: Add RTD1319 SoC and Realtek Pym

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Add Device Trees for Realtek RTD1319 SoC family, RTD1319 SoC and Realtek Pym Particles EVB.

Signed-off-by: cy.huang <cy.huang@xxxxxxxxxxx>
---

v1:
 * RTD1319 SoC and Realtek PymParticle EVB

 arch/arm64/boot/dts/realtek/Makefile          |   2 +
 .../boot/dts/realtek/rtd1319-pymparticles.dts |  28 ++
 arch/arm64/boot/dts/realtek/rtd13xx.dtsi      | 346 ++++++++++++++++++
 3 files changed, 376 insertions(+)
 create mode 100644 arch/arm64/boot/dts/realtek/rtd1319-pymparticles.dts
 create mode 100644 arch/arm64/boot/dts/realtek/rtd13xx.dtsi

diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile
index ef8d8fcbaa05..ef569b8ebd13 100644
--- a/arch/arm64/boot/dts/realtek/Makefile
+++ b/arch/arm64/boot/dts/realtek/Makefile
@@ -13,3 +13,5 @@ dtb-$(CONFIG_ARCH_REALTEK) += rtd1395-bpi-m4.dtb
 dtb-$(CONFIG_ARCH_REALTEK) += rtd1395-lionskin.dtb

 dtb-$(CONFIG_ARCH_REALTEK) += rtd1619-mjolnir.dtb
+
+dtb-$(CONFIG_ARCH_REALTEK) += rtd1319-pymparticles.dtb
diff --git a/arch/arm64/boot/dts/realtek/rtd1319-pymparticles.dts b/arch/arm64/boot/dts/realtek/rtd1319-pymparticles.dts
new file mode 100644
index 000000000000..6e46bf9ac252
--- /dev/null
+++ b/arch/arm64/boot/dts/realtek/rtd1319-pymparticles.dts
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: (GPL-3.0-or-later OR BSD-2-Clause)
+/*
+ * Copyright (c) 2019-2020 Realtek Semiconductor Corp.
+ */
+
+/dts-v1/;
+
+#include "rtd13xx.dtsi"
+
+/ {
+       compatible = "realtek,pym-particles", "realtek,rtd1319";
+       model = "Realtek Pym Particles EVB";
+
+       memory@40000 {
+               device_type = "memory";
+               reg = <0x00040000 0x7ffc0000>; /* boot ROM to 1 GiB or 2 GiB */
+       };
+
+       chosen {
+               stdout-path = "serial0:460800n8";
+       };
+};
+
+/* debug console (J1) */
+&uart0 {
+       status = "okay";
+};
+
diff --git a/arch/arm64/boot/dts/realtek/rtd13xx.dtsi b/arch/arm64/boot/dts/realtek/rtd13xx.dtsi
new file mode 100644
index 000000000000..59af2489e170
--- /dev/null
+++ b/arch/arm64/boot/dts/realtek/rtd13xx.dtsi
@@ -0,0 +1,346 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+/*
+ * Realtek RTD13xx SoC family
+ *
+ * Copyright (c) 2019-2020 Realtek Semiconductor Corp.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+       interrupt-parent = <&gic>;
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       reserved_memory: reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               protected_mem: protected_mem@40000 {
+                       reg = <0x00040000 0x1000000>;
+                       no-map;
+               };
+
+               rpc_comm: comm@4080000 {
+                       reg = <0x04080000 0x1000>;
+               };
+
+               rpc_ringbuf: ringbuf@40ff000 {
+                       reg = <0x040ff000 0x4000>;
+               };
+
+               audio_heap: audio_heap@4200000 {
+                       reg = <0x04200000 0xc00000>;
+               };
+
+               media_heap: media_heap@4e00000 {
+                       reg = <0x04e00000 0x06000000>;
+               };
+
+               audio_fw_mem: audio_fw_mem@10000000 {
+                       reg = <0x10000000 0x14000>;
+                       no-map;
+               };
+
+               tee: tee@10100000 {
+                       reg = <0x10100000 0x04100000>;
+                       no-map;
+               };
+
+               cma_resrved_0:linux,default_cma {
+                       compatible = "shared-dma-pool";
+                       size = <0x02000000>;
+                       alignment = <0x01000000>;
+                       alloc-ranges=<0x00000000 0x80000000>;
+                       linux,cma-default;
+                       linux,contiguous-region;
+                       reusable;
+               };
+
+               cma_resrved_1:linux,cma_1 {
+                       compatible = "shared-dma-pool";
+                       size = <0x02000000>;
+                       alloc-ranges=<0x14200000 0x0be00000>;
+                       linux,contiguous-region;
+                       reusable;
+                       status = "disabled";
+               };
+
+               cma_resrved_2:linux,cma_2 {
+                       compatible = "shared-dma-pool";
+                       size = <0x08000000>;
+                       alloc-ranges=<0x00000000 0x60000000>;
+                       linux,contiguous-region;
+                       reusable;
+               };
+
+               cma_resrved_3:linux,cma_3 {
+                       compatible = "shared-dma-pool";
+                       size = <0x10000000>;
+                       alignment = <0x01000000>;
+                       alloc-ranges=<0x00000000 0x80000000>;
+                       linux,contiguous-region;
+                       reusable;
+               };
+
+               cma_resrved_4:linux,cma_4 {
+                       compatible = "shared-dma-pool";
+                       size = <0x02000000>;
+                       alignment = <0x01000000>;
+                       linux,contiguous-region;
+                       reusable;
+               };
+
+               cma_resrved_5:linux,cma_5 {
+                       compatible = "shared-dma-pool";
+                       size = <0x01000000>;
+                       alignment = <0x01000000>;
+                       alloc-ranges=<0x00000000 0x60000000>;
+                       linux,contiguous-region;
+                       reusable;
+               };
+
+               cma_resrved_6:linux,cma_6 {
+                       compatible = "shared-dma-pool";
+                       size = <0x02000000>;
+                       alignment = <0x01000000>;
+                       alloc-ranges=<0x00000000 0x60000000>;
+                       linux,contiguous-region;
+                       reusable;
+               };
+
+               cma_resrved_7:linux,cma_7 {
+                       compatible = "shared-dma-pool";
+                       size = <0x01000000>;
+                       alignment = <0x01000000>;
+                       alloc-ranges=<0x00000000 0x60000000>;
+                       linux,contiguous-region;
+                       reusable;
+               };
+
+               cma_resrved_8:linux,cma_8 {
+                       compatible = "shared-dma-pool";
+                       size = <0x06000000>;
+                       alignment = <0x01000000>;
+                       alloc-ranges=<0x00000000 0x60000000>;
+                       linux,contiguous-region;
+                       reusable;
+               };
+
+               cma_resrved_9:linux,cma_9 {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x04000000>;
+                       alignment = <0x01000000>;
+                       linux,contiguous-region;
+                       alloc-ranges=<0x00000000 0x60000000>;
+               };
+       };
+
+       clocks {
+               osc27m: osc {
+                       compatible = "fixed-clock";
+                       clock-frequency = <27000000>;
+                       clock-output-names = "osc27m";
+                       #clock-cells = <0>;
+               };
+
+               baudclk: baudclk {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <432000000>;
+                       clock-output-names = "baudclk";
+               };
+       };
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a55";
+                       reg = <0x0>;
+                       enable-method = "psci";
+                       next-level-cache = <&l2>;
+               };
+
+               cpu1: cpu@100 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a55";
+                       reg = <0x100>;
+                       enable-method = "psci";
+                       next-level-cache = <&l2>;
+               };
+
+               cpu2: cpu@200 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a55";
+                       reg = <0x200>;
+                       enable-method = "psci";
+                       next-level-cache = <&l2>;
+               };
+
+               cpu3: cpu@300 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a55";
+                       reg = <0x300>;
+                       enable-method = "psci";
+                       next-level-cache = <&l2>;
+               };
+
+               l2: l2-cache {
+                       compatible = "cache";
+               };
+       };
+
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+       };
+
+       arm_pmu: pmu {
+               compatible = "arm,armv8-pmuv3";
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
+               interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+       };
+
+       psci: psci {
+               compatible = "arm,psci-1.0";
+               method = "smc";
+       };
+
+       firmware {
+               optee {
+                       compatible = "linaro,optee-tz";
+                       method = "smc";
+               };
+       };
+
+       soc@0 {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x00000000 0x00000000 0x0002e000>, /* boot ROM */
+                        <0x00030000 0x00030000 0x00030000>, /* PCIE IO*/
+                        <0xff100000 0xff100000 0x00200000>, /* GIC */
+                        <0xC0000000 0xC0000000 0x00100000>,
+                        <0xC1000000 0xC1000000 0x00100000>,
+                        <0x98000000 0x98000000 0x00200000>; /* rbus */
+
+               rbus: rbus@98000000 {
+                       compatible = "simple-bus";
+                       reg = <0x98000000 0x200000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x00000000 0x98000000 0x200000>,
+                                <0xC0000000 0xC0000000 0x00100000>,
+                                <0xC1000000 0xC1000000 0x00100000>,
+                                <0x10030000 0x00030000 0x00030000>; /* 
+ PCIE IO*/
+
+                       crt: syscon@0 {
+                               compatible = "syscon", "simple-mfd";
+                               reg = <0x0 0x1000>;
+                               reg-io-width = <4>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0x0 0x1000>;
+                       };
+
+                       pinctrl: pinctrl@4e000 {
+                               compatible = "syscon";
+                               reg = <0x4e000 0x130>;
+                               reg-io-width = <4>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               #gpio-range-cells = <3>;
+                               ranges = <0x0 0x4e000 0x130>;
+                       };
+
+                       iso: syscon@7000 {
+                               compatible = "syscon", "simple-mfd";
+                               reg = <0x7000 0x1000>;
+                               reg-io-width = <4>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0x7000 0x1000>;
+                       };
+
+                       sb2: syscon@1a000 {
+                               compatible = "syscon", "simple-mfd";
+                               reg = <0x1a000 0x1000>;
+                               reg-io-width = <4>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0x1a000 0x1000>;
+                       };
+
+                       misc: syscon@1b000 {
+                               compatible = "syscon", "simple-mfd";
+                               reg = <0x1b000 0x1000>;
+                               reg-io-width = <4>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0x1b000 0x1000>;
+                       };
+
+                       sbx: syscon@1c000 {
+                               compatible = "syscon", "simple-mfd";
+                               reg = <0x1c000 0x1000>;
+                               reg-io-width = <4>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0x1c000 0x1000>;
+                       };
+
+                       scpu_wrapper: syscon@1d000 {
+                               compatible = "syscon", "simple-mfd";
+                               reg = <0x1d000 0x1000>;
+                               reg-io-width = <4>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0x1d000 0x1000>;
+                       };
+
+                       cbus_wrapper: syscon@37500 {
+                               compatible = "syscon", "simple-mfd";
+                               reg = <0x37500 0x10>;
+                               reg-io-width = <4>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0x37500 0x10>;
+                       };
+
+               };
+
+               gic: interrupt-controller@ff100000 {
+                       compatible = "arm,gic-v3";
+                       #address-cells = <1>;
+                       reg = <0xff100000 0x10000>,
+                             <0xff140000 0x80000>;
+                       interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-controller;
+                       #interrupt-cells = <3>;
+               };
+
+       };
+};
+
+
+&iso {
+       uart0: serial@800 {
+               compatible = "snps,dw-apb-uart";
+               reg = <0x800 0x400>;
+               reg-shift = <2>;
+               reg-io-width = <4>;
+               interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+               clock-frequency = <432000000>;
+               status = "disabled";
+       };
+};
+
--
2.39.0




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