On Mon, 27 Mar 2023 10:35:47 -0500, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@xxxxxxxxxxx>
>
> For the Anbernic devices to display properly, we need to specify the
> clock frequency of the PLL_VPLL. Adding the parent clock in the
> rk356x.dtsi requires us to update our clock definitions to accomplish
> this.
>
> [...]
Applied, thanks!
[1/1] arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices
commit: 87891399d9883ed823ba58c2be3ac20cc499ad7d
Best regards,
--
Heiko Stuebner <heiko@xxxxxxxxx>
